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Commit b295477e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'mvebu-dt64-4.15-1' of git://git.infradead.org/linux-mvebu into next/dt

Pull "mvebu dt64 for 4.15 (part 1)" from Gregory CLEMENT:

On Armada 7K/8k:
- Improve network support at SoC and board level
- Enable watchdog
- Add UART muxing
- On 7040 DB: add CD SDIO and NAND support
- On 8040 DB: add PCIE more ports and SPI1

On Armada 37xx:
 - Fix UART register size
 - Add vmmc regulator for SD on 3720 DB

* tag 'mvebu-dt64-4.15-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: 7040-db: Add the carrier detect pin for SD card on CP
  arm64: dts: marvell: 7040-db: Document the gpio expander
  arm64: dts: marvell: enable additional PCIe ports on Armada 8040 DB
  arm64: dts: marvell: add NAND support on the 7040-DB board
  arm64: dts: marvell: Enable Armada-8040-DB CPS SPI1
  arm64: dts: marvell: 8040-db: enable the SFP ports
  arm64: dts: marvell: 7040-db: enable the SFP port
  arm64: dts: marvell: 7040-db: add comphy reference to Ethernet port
  arm64: dts: marvell: mcbin: add comphy references to Ethernet ports
  arm64: dts: marvell: 37xx: remove empty line
  arm64: dts: marvell: cp110: add PPv2 port interrupts
  arm64: dts: marvell: add comphy nodes on cp110 master and slave
  arm64: dts: marvell: extend the cp110 syscon register area length
  arm64: dts: marvell: enable AP806 watchdog
  arm64: dts: marvell: Fix A37xx UART0 register size
  arm64: dts: marvell: armada-3720-db: Add vmmc regulator for SD slot
  arm64: dts: marvell: add UART muxing on Armada 7K/8K
parents a2c614a7 c4e3bf29
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+1 −1
Original line number Diff line number Diff line
@@ -8,6 +8,6 @@ Required properties:
Example:
	serial@12000 {
		compatible = "marvell,armada-3700-uart";
		reg = <0x12000 0x400>;
		reg = <0x12000 0x200>;
		interrupts = <43>;
	};
+11 −0
Original line number Diff line number Diff line
@@ -94,6 +94,16 @@
			  3300000 0x0>;
		enable-active-high;
	};

	vcc_sd_reg2: regulator-vmcc {
		compatible = "regulator-fixed";
		regulator-name = "vcc_sd2";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		enable-active-high;
		gpio = <&gpio_exp 4 GPIO_ACTIVE_HIGH>;
	};
};

/* Gigabit module on CON19(V2.0)/CON21(V1.4) */
@@ -179,6 +189,7 @@
	bus-width = <4>;
	marvell,pad-type = "sd";
	vqmmc-supply = <&vcc_sd_reg1>;
	vmmc-supply = <&vcc_sd_reg2>;
	status = "okay";
};

+1 −2
Original line number Diff line number Diff line
@@ -134,7 +134,7 @@

			uart0: serial@12000 {
				compatible = "marvell,armada-3700-uart";
				reg = <0x12000 0x400>;
				reg = <0x12000 0x200>;
				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};
@@ -183,7 +183,6 @@
					<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;

				};

				xtalclk: xtal-clk {
+54 −1
Original line number Diff line number Diff line
@@ -124,6 +124,8 @@

&uart0 {
	status = "okay";
	pinctrl-0 = <&uart0_pins>;
	pinctrl-names = "default";
};


@@ -141,9 +143,49 @@
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x21>;
		/*
		 * IO0_0: USB3_PWR_EN0	IO1_0: USB_3_1_Dev_Detect
		 * IO0_1: USB3_PWR_EN1	IO1_1: USB2_1_current_limit
		 * IO0_2: DDR3_4_Detect	IO1_2: Hcon_IO_RstN
		 * IO0_3: USB2_DEVICE_DETECT
		 * IO0_4: GPIO_0	IO1_4: SD_Status
		 * IO0_5: GPIO_1	IO1_5: LDO_5V_Enable
		 * IO0_6: IHB_5V_Enable	IO1_6: PWR_EN_eMMC
		 * IO0_7:		IO1_7: SDIO_Vcntrl
		 */
	};
};

&cpm_nand {
	/*
	 * SPI on CPM and NAND have common pins on this board. We can
	 * use only one at a time. To enable the NAND (whihch will
	 * disable the SPI), the "status = "okay";" line have to be
	 * added here.
	 */
	num-cs = <1>;
	pinctrl-0 = <&nand_pins>, <&nand_rb>;
	pinctrl-names = "default";
	nand-ecc-strength = <4>;
	nand-ecc-step-size = <512>;
	marvell,nand-enable-arbiter;
	nand-on-flash-bbt;

	partition@0 {
		label = "U-Boot";
		reg = <0 0x200000>;
	};
	partition@200000 {
		label = "Linux";
		reg = <0x200000 0xe00000>;
	};
	partition@1000000 {
		label = "Filesystem";
		reg = <0x1000000 0x3f000000>;
	};
};


&cpm_spi1 {
	status = "okay";

@@ -197,7 +239,7 @@
	status = "okay";
	bus-width = <4>;
	no-1-8-v;
	non-removable;
	cd-gpios = <&expander0 12 GPIO_ACTIVE_LOW>;
};

&cpm_mdio {
@@ -215,10 +257,21 @@
	status = "okay";
};

&cpm_eth0 {
	status = "okay";
	/* Network PHY */
	phy-mode = "10gbase-kr";
	/* Generic PHY, providing serdes lanes */
	phys = <&cpm_comphy2 0>;
};

&cpm_eth1 {
	status = "okay";
	/* Network PHY */
	phy = <&phy0>;
	phy-mode = "sgmii";
	/* Generic PHY, providing serdes lanes */
	phys = <&cpm_comphy0 1>;
};

&cpm_eth2 {
+14 −0
Original line number Diff line number Diff line
@@ -64,5 +64,19 @@
&cpm_syscon0 {
	cpm_pinctrl: pinctrl {
		compatible = "marvell,armada-7k-pinctrl";

		nand_pins: nand-pins {
			marvell,pins =
			"mpp15", "mpp16", "mpp17", "mpp18",
			"mpp19", "mpp20", "mpp21", "mpp22",
			"mpp23", "mpp24", "mpp25", "mpp26",
			"mpp27";
			marvell,function = "dev";
		};

		nand_rb: nand-rb {
			marvell,pins = "mpp13";
			marvell,function = "nf";
		};
	};
};
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