Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b14f3bd9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc 

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc: Fix up dma_alloc_coherent() on platforms without cache coherency.
  powerpc: Minor cleanups of kernel virt address space definitions
  powerpc: Move dma-noncoherent.c from arch/powerpc/lib to arch/powerpc/mm
  Revert "powerpc: Rework dma-noncoherent to use generic vmalloc layer"
parents 911e690e 8b31e49d

arch/powerpc/Kconfig

+12 −0
Original line number Diff line number Diff line
@@ -868,6 +868,18 @@ config TASK_SIZE 
	default "0x80000000" if PPC_PREP || PPC_8xx

	default "0xc0000000"



config CONSISTENT_SIZE_BOOL

	bool "Set custom consistent memory pool size"

	depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE

	help

	  This option allows you to set the size of the

	  consistent memory pool.  This pool of virtual memory

	  is used to make consistent memory allocations.



config CONSISTENT_SIZE

	hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL

	default "0x00200000" if NOT_COHERENT_CACHE



config PIN_TLB

	bool "Pinned Kernel TLBs (860 ONLY)"

	depends on ADVANCED_OPTIONS && 8xx

arch/powerpc/include/asm/dma-mapping.h

+4 −2
Original line number Diff line number Diff line
@@ -26,7 +26,9 @@ 
 * allocate the space "normally" and use the cache management functions

 * to ensure it is consistent.

 */

extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);

struct device;

extern void *__dma_alloc_coherent(struct device *dev, size_t size,

				  dma_addr_t *handle, gfp_t gfp);

extern void __dma_free_coherent(size_t size, void *vaddr);

extern void __dma_sync(void *vaddr, size_t size, int direction);

extern void __dma_sync_page(struct page *page, unsigned long offset,
@@ -37,7 +39,7 @@ extern void __dma_sync_page(struct page *page, unsigned long offset, 
 * Cache coherent cores.

 */



#define __dma_alloc_coherent(gfp, size, handle)	NULL

#define __dma_alloc_coherent(dev, gfp, size, handle)	NULL

#define __dma_free_coherent(size, addr)		((void)0)

#define __dma_sync(addr, size, rw)		((void)0)

#define __dma_sync_page(pg, off, sz, rw)	((void)0)

arch/powerpc/include/asm/fixmap.h

+2 −2
Original line number Diff line number Diff line
@@ -14,8 +14,6 @@ 
#ifndef _ASM_FIXMAP_H

#define _ASM_FIXMAP_H



extern unsigned long FIXADDR_TOP;



#ifndef __ASSEMBLY__

#include <linux/kernel.h>

#include <asm/page.h>
@@ -24,6 +22,8 @@ extern unsigned long FIXADDR_TOP; 
#include <asm/kmap_types.h>

#endif



#define FIXADDR_TOP	((unsigned long)(-PAGE_SIZE))



/*

 * Here we define all the compile-time 'special' virtual

 * addresses. The point is to have a constant address at

arch/powerpc/include/asm/pgtable-ppc32.h

+24 −2
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ 


extern unsigned long va_to_phys(unsigned long address);

extern pte_t *va_to_pte(unsigned long address);

extern unsigned long ioremap_bot, ioremap_base;

extern unsigned long ioremap_bot;



#ifdef CONFIG_44x

extern int icache_44x_need_flush;
@@ -55,9 +55,31 @@ extern int icache_44x_need_flush; 
#define pgd_ERROR(e) \

	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))



/*

 * This is the bottom of the PKMAP area with HIGHMEM or an arbitrary

 * value (for now) on others, from where we can start layout kernel

 * virtual space that goes below PKMAP and FIXMAP

 */

#ifdef CONFIG_HIGHMEM

#define KVIRT_TOP	PKMAP_BASE

#else

#define KVIRT_TOP	(0xfe000000UL)	/* for now, could be FIXMAP_BASE ? */

#endif



/*

 * ioremap_bot starts at that address. Early ioremaps move down from there,

 * until mem_init() at which point this becomes the top of the vmalloc

 * and ioremap space

 */

#ifdef CONFIG_NOT_COHERENT_CACHE

#define IOREMAP_TOP	((KVIRT_TOP - CONFIG_CONSISTENT_SIZE) & PAGE_MASK)

#else

#define IOREMAP_TOP	KVIRT_TOP

#endif



/*

 * Just any arbitrary offset to the start of the vmalloc VM area: the

 * current 64MB value just means that there will be a 64MB "hole" after the

 * current 16MB value just means that there will be a 64MB "hole" after the

 * physical memory until the kernel virtual memory starts.  That means that

 * any out-of-bounds memory accesses will hopefully be caught.

 * The vmalloc() routines leaves a hole of 4kB between each vmalloced

arch/powerpc/kernel/dma.c

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size, 
{

	void *ret;

#ifdef CONFIG_NOT_COHERENT_CACHE

	ret = __dma_alloc_coherent(size, dma_handle, flag);

	ret = __dma_alloc_coherent(dev, size, dma_handle, flag);

	if (ret == NULL)

		return NULL;

	*dma_handle += get_dma_direct_offset(dev);