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Commit b11eefa8 authored by Yuanfang Zhang's avatar Yuanfang Zhang
Browse files

coresight: csr: update programming sequence of enabling etr to bam 



There is a new programming sequence on Kona, the register of
QDSS_QDSS_CS_QDSSCSR_USBFLSHCTRL should be configured after
programming TMC ETR registers. This changes use new programming
sequence to enable etr to bam. Add sysfs interface in CSR to let
user space change usb flush period.

Change-Id: I0cee7db746106fd0318d01a92682f185cb31ad97
Signed-off-by: default avatarYuanfang Zhang <zhangyuanfang@codeaurora.org>
parent 0985aa84

drivers/hwtracing/coresight/coresight-common.h

+2 −1
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.

 */



#ifndef _CORESIGHT_COMMON_H
@@ -16,6 +16,7 @@ struct coresight_csr { 


#ifdef CONFIG_CORESIGHT_CSR

extern void msm_qdss_csr_enable_bam_to_usb(struct coresight_csr *csr);

extern void msm_qdss_csr_enable_flush(struct coresight_csr *csr);

extern void msm_qdss_csr_disable_bam_to_usb(struct coresight_csr *csr);

extern void msm_qdss_csr_disable_flush(struct coresight_csr *csr);

extern int coresight_csr_hwctrl_set(struct coresight_csr *csr, uint64_t addr,

drivers/hwtracing/coresight/coresight-csr.c

+106 −10
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2012-2013, 2015-2-17 The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2013, 2015-2017, 2019 The Linux Foundation. All rights reserved.

 */



#include <linux/kernel.h>
@@ -66,12 +66,15 @@ do { \ 
#define BLKSIZE_1024		2

#define BLKSIZE_2048		3



#define FLUSHPERIOD_2048	0x800



struct csr_drvdata {

	void __iomem		*base;

	phys_addr_t		pbase;

	struct device		*dev;

	struct coresight_device	*csdev;

	uint32_t		blksize;

	uint32_t		flushperiod;

	struct coresight_csr		csr;

	struct clk		*clk;

	spinlock_t		spin_lock;
@@ -79,6 +82,7 @@ struct csr_drvdata { 
	bool			hwctrl_set_support;

	bool			set_byte_cntr_support;

	bool			timestamp_support;

	bool			enable_flush;

};



static LIST_HEAD(csr_list);
@@ -86,10 +90,23 @@ static DEFINE_MUTEX(csr_lock); 


#define to_csr_drvdata(c) container_of(c, struct csr_drvdata, csr)



static void msm_qdss_csr_config_flush_period(struct csr_drvdata *drvdata)

{

	uint32_t usbflshctrl;



	CSR_UNLOCK(drvdata);



	usbflshctrl = csr_readl(drvdata, CSR_USBFLSHCTRL);

	usbflshctrl = (usbflshctrl & ~0x3FFFC) | (drvdata->flushperiod << 2);

	csr_writel(drvdata, usbflshctrl, CSR_USBFLSHCTRL);



	CSR_LOCK(drvdata);

}



void msm_qdss_csr_enable_bam_to_usb(struct coresight_csr *csr)

{

	struct csr_drvdata *drvdata;

	uint32_t usbbamctrl, usbflshctrl;

	uint32_t usbbamctrl;

	unsigned long flags;



	if (csr == NULL)
@@ -106,12 +123,6 @@ void msm_qdss_csr_enable_bam_to_usb(struct coresight_csr *csr) 
	usbbamctrl = (usbbamctrl & ~0x3) | drvdata->blksize;

	csr_writel(drvdata, usbbamctrl, CSR_USBBAMCTRL);



	usbflshctrl = csr_readl(drvdata, CSR_USBFLSHCTRL);

	usbflshctrl = (usbflshctrl & ~0x3FFFC) | (0xFFFF << 2);

	csr_writel(drvdata, usbflshctrl, CSR_USBFLSHCTRL);

	usbflshctrl |= 0x2;

	csr_writel(drvdata, usbflshctrl, CSR_USBFLSHCTRL);



	usbbamctrl |= 0x4;

	csr_writel(drvdata, usbbamctrl, CSR_USBBAMCTRL);
@@ -120,6 +131,36 @@ void msm_qdss_csr_enable_bam_to_usb(struct coresight_csr *csr) 
}

EXPORT_SYMBOL(msm_qdss_csr_enable_bam_to_usb);



void msm_qdss_csr_enable_flush(struct coresight_csr *csr)

{

	struct csr_drvdata *drvdata;

	uint32_t usbflshctrl;

	unsigned long flags;



	if (csr == NULL)

		return;



	drvdata = to_csr_drvdata(csr);

	if (IS_ERR_OR_NULL(drvdata) || !drvdata->usb_bam_support)

		return;



	spin_lock_irqsave(&drvdata->spin_lock, flags);



	msm_qdss_csr_config_flush_period(drvdata);



	CSR_UNLOCK(drvdata);



	usbflshctrl = csr_readl(drvdata, CSR_USBFLSHCTRL);

	usbflshctrl |= 0x2;

	csr_writel(drvdata, usbflshctrl, CSR_USBFLSHCTRL);



	CSR_LOCK(drvdata);

	drvdata->enable_flush = true;

	spin_unlock_irqrestore(&drvdata->spin_lock, flags);

}

EXPORT_SYMBOL(msm_qdss_csr_enable_flush);





void msm_qdss_csr_disable_bam_to_usb(struct coresight_csr *csr)

{

	struct csr_drvdata *drvdata;
@@ -166,6 +207,7 @@ void msm_qdss_csr_disable_flush(struct coresight_csr *csr) 
	csr_writel(drvdata, usbflshctrl, CSR_USBFLSHCTRL);



	CSR_LOCK(drvdata);

	drvdata->enable_flush = false;

	spin_unlock_irqrestore(&drvdata->spin_lock, flags);

}

EXPORT_SYMBOL(msm_qdss_csr_disable_flush);
@@ -295,14 +337,66 @@ static ssize_t timestamp_show(struct device *dev, 


static DEVICE_ATTR_RO(timestamp);



static ssize_t flushperiod_show(struct device *dev,

				struct device_attribute *attr,

				char *buf)

{

	struct csr_drvdata *drvdata = dev_get_drvdata(dev->parent);



	if (IS_ERR_OR_NULL(drvdata) || !drvdata->usb_bam_support) {

		dev_err(dev, "Invalid param\n");

		return -EINVAL;

	}



	return scnprintf(buf, PAGE_SIZE, "%#lx\n", drvdata->flushperiod);

}



static ssize_t flushperiod_store(struct device *dev,

				struct device_attribute *attr,

				const char *buf,

				size_t size)

{

	unsigned long flags;

	unsigned long val;

	struct csr_drvdata *drvdata = dev_get_drvdata(dev->parent);



	if (IS_ERR_OR_NULL(drvdata) || !drvdata->usb_bam_support) {

		dev_err(dev, "Invalid param\n");

		return -EINVAL;

	}



	spin_lock_irqsave(&drvdata->spin_lock, flags);



	if (kstrtoul(buf, 0, &val) || val > 0xffff) {

		spin_unlock_irqrestore(&drvdata->spin_lock, flags);

		return -EINVAL;

	}



	if (drvdata->flushperiod == val)

		goto out;



	drvdata->flushperiod = val;



	if (drvdata->enable_flush)

		msm_qdss_csr_config_flush_period(drvdata);



out:

	spin_unlock_irqrestore(&drvdata->spin_lock, flags);

	return size;

}



static DEVICE_ATTR_RW(flushperiod);



static struct attribute *csr_attrs[] = {

	&dev_attr_timestamp.attr,

	&dev_attr_flushperiod.attr,

	NULL,

};



static struct attribute_group csr_attr_grp = {

	.attrs = csr_attrs,

};



static const struct attribute_group *csr_attr_grps[] = {

	&csr_attr_grp,

	NULL,
@@ -374,13 +468,15 @@ static int csr_probe(struct platform_device *pdev) 
	else

		dev_dbg(dev, "timestamp_support operation supported\n");



	if (drvdata->usb_bam_support)

		drvdata->flushperiod = FLUSHPERIOD_2048;



	desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);

	if (!desc)

		return -ENOMEM;

	desc->type = CORESIGHT_DEV_TYPE_NONE;

	desc->pdata = pdev->dev.platform_data;

	desc->dev = &pdev->dev;

	if (drvdata->timestamp_support)

	desc->groups = csr_attr_grps;



	drvdata->csdev = coresight_register(desc);

drivers/hwtracing/coresight/coresight-tmc-etr.c

+1 −0
Original line number Diff line number Diff line
@@ -1114,6 +1114,7 @@ static void __tmc_etr_enable_to_bam(struct tmc_drvdata *drvdata) 


	CS_LOCK(drvdata->base);



	msm_qdss_csr_enable_flush(drvdata->csr);

	drvdata->enable_to_bam = true;

}