Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit af5e1a68 authored by Adriana Reus's avatar Adriana Reus Committed by Jonathan Cameron
Browse files

iio:inv-mpu6050: Fix inconsistency for the scale channel 



Fix inconsistency in the semantics of the scale attribute.
For scale the write_raw function was considering the scale table index
and writing the appropriate value into the range register, while
for read_raw it was outputting the actual scale.
Fix this behaviour and adhere to the iio ABI specification.

Signed-off-by: default avatarAdriana Reus <adriana.reus@intel.com>
Reviewed-by: default avatarViorel Suman <viorel.suman@intel.com>
Signed-off-by: default avatarJonathan Cameron <jic23@kernel.org>
parent ed170ded

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

+30 −26
Original line number Diff line number Diff line
@@ -410,43 +410,47 @@ static int inv_mpu6050_read_raw(struct iio_dev *indio_dev, 
	}

}



static int inv_mpu6050_write_fsr(struct inv_mpu6050_state *st, int fsr)

static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)

{

	int result;

	int result, i;

	u8 d;



	if (fsr < 0 || fsr > INV_MPU6050_MAX_GYRO_FS_PARAM)

		return -EINVAL;

	if (fsr == st->chip_config.fsr)

		return 0;



	d = (fsr << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);

	result = inv_mpu6050_write_reg(st, st->reg->gyro_config, d);

	for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {

		if (gyro_scale_6050[i] == val) {

			d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);

			result = inv_mpu6050_write_reg(st,

					st->reg->gyro_config, d);

			if (result)

				return result;

	st->chip_config.fsr = fsr;



			st->chip_config.fsr = i;

			return 0;

		}

	}



	return -EINVAL;

}



static int inv_mpu6050_write_accel_fs(struct inv_mpu6050_state *st, int fs)

static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)

{

	int result;

	int result, i;

	u8 d;



	if (fs < 0 || fs > INV_MPU6050_MAX_ACCL_FS_PARAM)

		return -EINVAL;

	if (fs == st->chip_config.accl_fs)

		return 0;



	d = (fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);

	result = inv_mpu6050_write_reg(st, st->reg->accl_config, d);

	for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {

		if (accel_scale[i] == val) {

			d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);

			result = inv_mpu6050_write_reg(st,

					st->reg->accl_config, d);

			if (result)

				return result;

	st->chip_config.accl_fs = fs;



			st->chip_config.accl_fs = i;

			return 0;

		}

	}



	return -EINVAL;

}



static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,

			       struct iio_chan_spec const *chan,
@@ -471,10 +475,10 @@ static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, 
	case IIO_CHAN_INFO_SCALE:

		switch (chan->type) {

		case IIO_ANGL_VEL:

			result = inv_mpu6050_write_fsr(st, val);

			result = inv_mpu6050_write_gyro_scale(st, val2);

			break;

		case IIO_ACCEL:

			result = inv_mpu6050_write_accel_fs(st, val);

			result = inv_mpu6050_write_accel_scale(st, val2);

			break;

		default:

			result = -EINVAL;