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Commit af25ed59 authored by Andy Lutomirski's avatar Andy Lutomirski Committed by Ingo Molnar
Browse files

x86/fpu: Remove clts() 



The kernel doesn't use clts() any more.  Remove it and all of its
paravirt infrastructure.

A careful reader may notice that xen_clts() appears to have been
buggy -- it didn't update xen_cr0_value.

Signed-off-by: default avatarAndy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kvm list <kvm@vger.kernel.org>
Link: http://lkml.kernel.org/r/3d3c8ca62f17579b9849a013d71e59a4d5d1b079.1477951965.git.luto@kernel.org


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 0d50612c

arch/x86/include/asm/paravirt.h

+0 −5
Original line number Diff line number Diff line
@@ -41,11 +41,6 @@ static inline void set_debugreg(unsigned long val, int reg) 
	PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);

}



static inline void clts(void)

{

	PVOP_VCALL0(pv_cpu_ops.clts);

}



static inline unsigned long read_cr0(void)

{

	return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);

arch/x86/include/asm/paravirt_types.h

+0 −2
Original line number Diff line number Diff line
@@ -103,8 +103,6 @@ struct pv_cpu_ops { 
	unsigned long (*get_debugreg)(int regno);

	void (*set_debugreg)(int regno, unsigned long value);



	void (*clts)(void);



	unsigned long (*read_cr0)(void);

	void (*write_cr0)(unsigned long);

arch/x86/include/asm/special_insns.h

+0 −11
Original line number Diff line number Diff line
@@ -6,11 +6,6 @@ 


#include <asm/nops.h>



static inline void native_clts(void)

{

	asm volatile("clts");

}



/*

 * Volatile isn't enough to prevent the compiler from reordering the

 * read/write functions for the control registers and messing everything up.
@@ -208,12 +203,6 @@ static inline void load_gs_index(unsigned selector) 


#endif



/* Clear the 'TS' bit */

static inline void clts(void)

{

	native_clts();

}



#endif/* CONFIG_PARAVIRT */



static inline void clflush(volatile void *__p)

arch/x86/kernel/paravirt.c

+0 −1
Original line number Diff line number Diff line
@@ -328,7 +328,6 @@ __visible struct pv_cpu_ops pv_cpu_ops = { 
	.cpuid = native_cpuid,

	.get_debugreg = native_get_debugreg,

	.set_debugreg = native_set_debugreg,

	.clts = native_clts,

	.read_cr0 = native_read_cr0,

	.write_cr0 = native_write_cr0,

	.read_cr4 = native_read_cr4,

arch/x86/kernel/paravirt_patch_32.c

+0 −2
Original line number Diff line number Diff line
@@ -8,7 +8,6 @@ DEF_NATIVE(pv_cpu_ops, iret, "iret"); 
DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax");

DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3");

DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax");

DEF_NATIVE(pv_cpu_ops, clts, "clts");



#if defined(CONFIG_PARAVIRT_SPINLOCKS)

DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%eax)");
@@ -48,7 +47,6 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf, 
		PATCH_SITE(pv_mmu_ops, read_cr2);

		PATCH_SITE(pv_mmu_ops, read_cr3);

		PATCH_SITE(pv_mmu_ops, write_cr3);

		PATCH_SITE(pv_cpu_ops, clts);

#if defined(CONFIG_PARAVIRT_SPINLOCKS)

		case PARAVIRT_PATCH(pv_lock_ops.queued_spin_unlock):

			if (pv_is_native_spin_unlock()) {