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Commit af1dc13e authored by Peter Korsgaard's avatar Peter Korsgaard Committed by David S. Miller
Browse files

phylib: SIOCGMIIREG/SIOCSMIIREG: allow access to all mdio addresses 



phylib would silently ignore the phy_id argument to these ioctls and
perform the read/write with the active phydev address, whereas most
non-phylib drivers seem to allow access to all mdio addresses
(E.G. pcnet_cs).

Signed-off-by: default avatarPeter Korsgaard <jacmet@sunsite.dk>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent dc187cb3

drivers/net/phy/phy.c

+5 −3
Original line number Diff line number Diff line
@@ -319,7 +319,8 @@ int phy_mii_ioctl(struct phy_device *phydev, 
		/* fall through */



	case SIOCGMIIREG:

		mii_data->val_out = phy_read(phydev, mii_data->reg_num);

		mii_data->val_out = mdiobus_read(phydev->bus, mii_data->phy_id,

						 mii_data->reg_num);

		break;



	case SIOCSMIIREG:
@@ -350,7 +351,8 @@ int phy_mii_ioctl(struct phy_device *phydev, 
			}

		}



		phy_write(phydev, mii_data->reg_num, val);

		mdiobus_write(phydev->bus, mii_data->phy_id,

			      mii_data->reg_num, val);



		if (mii_data->reg_num == MII_BMCR &&

		    val & BMCR_RESET &&