Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit aef060e1 authored by Leo Liu's avatar Leo Liu Committed by Alex Deucher
Browse files

drm/amdgpu: disable vcn power control for now



The dpm control for vcn has been moved to firmware, kernel always spins
"amdgpu: [powerplay] pp_dpm_powergate_uvd was not implemented", each
time when application runs, disable it for now till pg/cg. Also remove
clock manual setting when dpm disabled, which was inherited from uvd.

Signed-off-by: default avatarLeo Liu <leo.liu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4a70af40
Loading
Loading
Loading
Loading
+6 −8
Original line number Diff line number Diff line
@@ -209,9 +209,9 @@ static void amdgpu_vcn_idle_work_handler(struct work_struct *work)

	if (fences == 0) {
		if (adev->pm.dpm_enabled) {
			/* might be used when with pg/cg
			amdgpu_dpm_enable_uvd(adev, false);
		} else {
			amdgpu_asic_set_uvd_clocks(adev, 0, 0);
			*/
		}
	} else {
		schedule_delayed_work(&adev->vcn.idle_work, VCN_IDLE_TIMEOUT);
@@ -223,12 +223,10 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)
	struct amdgpu_device *adev = ring->adev;
	bool set_clocks = !cancel_delayed_work_sync(&adev->vcn.idle_work);

	if (set_clocks) {
		if (adev->pm.dpm_enabled) {
	if (set_clocks && adev->pm.dpm_enabled) {
		/* might be used when with pg/cg
		amdgpu_dpm_enable_uvd(adev, true);
		} else {
			amdgpu_asic_set_uvd_clocks(adev, 53300, 40000);
		}
		*/
	}
}