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Commit ae4c42e4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'next/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc 

* 'next/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (133 commits)
  ARM: EXYNOS4: Change devname for FIMD clkdev
  ARM: S3C64XX: Cleanup mach/regs-fb.h from mach-s3c64xx
  ARM: S5PV210: Cleanup mach/regs-fb.h from mach-s5pv210
  ARM: S5PC100: Cleanup mach/regs-fb.h from mach-s5pc100
  ARM: S3C24XX: Use generic s3c_set_platdata for devices
  ARM: S3C64XX: Use generic s3c_set_platdata for OneNAND
  ARM: SAMSUNG: Use generic s3c_set_platdata for NAND
  ARM: SAMSUNG: Use generic s3c_set_platdata for USB OHCI
  ARM: SAMSUNG: Use generic s3c_set_platdata for HWMON
  ARM: SAMSUNG: Use generic s3c_set_platdata for FB
  ARM: SAMSUNG: Use generic s3c_set_platdata for TS
  ARM: S3C64XX: Add PWM backlight support on SMDK6410
  ARM: S5P64X0: Add PWM backlight support on SMDK6450
  ARM: S5P64X0: Add PWM backlight support on SMDK6440
  ARM: S5PC100: Add PWM backlight support on SMDKC100
  ARM: S5PV210: Add PWM backlight support on SMDKV210
  ARM: EXYNOS4: Add PWM backlight support on SMDKC210
  ARM: EXYNOS4: Add PWM backlight support on SMDKV310
  ARM: SAMSUNG: Create a common infrastructure for PWM backlight support
  clocksource: convert 32-bit down counting clocksource on S5PV210/S5P64X0
  ...

Fix up trivial conflict in arch/arm/mach-imx/mach-scb9328.c
parents dd58ecba ab2a0e0d

arch/arm/Kconfig

+9 −0
Original line number Diff line number Diff line
@@ -686,6 +686,7 @@ config ARCH_S3C2410 
	select GENERIC_GPIO

	select ARCH_HAS_CPUFREQ

	select HAVE_CLK

	select CLKDEV_LOOKUP

	select ARCH_USES_GETTIMEOFFSET

	select HAVE_S3C2410_I2C if I2C

	help
@@ -703,6 +704,7 @@ config ARCH_S3C64XX 
	select CPU_V6

	select ARM_VIC

	select HAVE_CLK

	select CLKDEV_LOOKUP

	select NO_IOPORT

	select ARCH_USES_GETTIMEOFFSET

	select ARCH_HAS_CPUFREQ
@@ -727,6 +729,8 @@ config ARCH_S5P64X0 
	select CPU_V6

	select GENERIC_GPIO

	select HAVE_CLK

	select CLKDEV_LOOKUP

	select CLKSRC_MMIO

	select HAVE_S3C2410_WATCHDOG if WATCHDOG

	select GENERIC_CLOCKEVENTS

	select HAVE_SCHED_CLOCK
@@ -740,6 +744,7 @@ config ARCH_S5PC100 
	bool "Samsung S5PC100"

	select GENERIC_GPIO

	select HAVE_CLK

	select CLKDEV_LOOKUP

	select CPU_V7

	select ARM_L1_CACHE_SHIFT_6

	select ARCH_USES_GETTIMEOFFSET
@@ -755,6 +760,8 @@ config ARCH_S5PV210 
	select ARCH_SPARSEMEM_ENABLE

	select GENERIC_GPIO

	select HAVE_CLK

	select CLKDEV_LOOKUP

	select CLKSRC_MMIO

	select ARM_L1_CACHE_SHIFT_6

	select ARCH_HAS_CPUFREQ

	select GENERIC_CLOCKEVENTS
@@ -771,6 +778,7 @@ config ARCH_EXYNOS4 
	select ARCH_SPARSEMEM_ENABLE

	select GENERIC_GPIO

	select HAVE_CLK

	select CLKDEV_LOOKUP

	select ARCH_HAS_CPUFREQ

	select GENERIC_CLOCKEVENTS

	select HAVE_S3C_RTC if RTC_CLASS
@@ -856,6 +864,7 @@ config ARCH_OMAP 
	select HAVE_CLK

	select ARCH_REQUIRE_GPIOLIB

	select ARCH_HAS_CPUFREQ

	select CLKSRC_MMIO

	select GENERIC_CLOCKEVENTS

	select HAVE_SCHED_CLOCK

	select ARCH_HAS_HOLES_MEMORYMODEL

arch/arm/configs/cm_x300_defconfig

+4 −14
Original line number Diff line number Diff line
@@ -5,7 +5,6 @@ CONFIG_SYSVIPC=y 
CONFIG_IKCONFIG=y

CONFIG_IKCONFIG_PROC=y

CONFIG_LOG_BUF_SHIFT=18

CONFIG_SYSFS_DEPRECATED_V2=y

CONFIG_BLK_DEV_INITRD=y

# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set

CONFIG_MODULES=y
@@ -13,6 +12,7 @@ CONFIG_MODULE_UNLOAD=y 
CONFIG_MODULE_FORCE_UNLOAD=y

# CONFIG_BLK_DEV_BSG is not set

CONFIG_ARCH_PXA=y

CONFIG_GPIO_PCA953X=y

CONFIG_MACH_CM_X300=y

CONFIG_NO_HZ=y

CONFIG_AEABI=y
@@ -23,7 +23,6 @@ CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=ubifs console=ttyS2,38400" 
CONFIG_CPU_FREQ=y

CONFIG_CPU_FREQ_GOV_USERSPACE=y

CONFIG_FPE_NWFPE=y

CONFIG_PM=y

CONFIG_APM_EMULATION=y

CONFIG_NET=y

CONFIG_PACKET=y
@@ -40,8 +39,8 @@ CONFIG_IP_PNP_RARP=y 
# CONFIG_INET_DIAG is not set

# CONFIG_IPV6 is not set

CONFIG_BT=m

CONFIG_BT_L2CAP=m

CONFIG_BT_SCO=m

CONFIG_BT_L2CAP=y

CONFIG_BT_SCO=y

CONFIG_BT_RFCOMM=m

CONFIG_BT_RFCOMM_TTY=y

CONFIG_BT_BNEP=m
@@ -60,7 +59,6 @@ CONFIG_MTD_NAND_PXA3xx=y 
CONFIG_MTD_UBI=y

CONFIG_BLK_DEV_LOOP=y

CONFIG_BLK_DEV_RAM=y

# CONFIG_MISC_DEVICES is not set

CONFIG_SCSI=y

CONFIG_BLK_DEV_SD=y

CONFIG_NETDEVICES=y
@@ -81,16 +79,15 @@ CONFIG_TOUCHSCREEN_WM97XX=m 
# CONFIG_TOUCHSCREEN_WM9705 is not set

# CONFIG_TOUCHSCREEN_WM9713 is not set

# CONFIG_SERIO is not set

# CONFIG_LEGACY_PTYS is not set

CONFIG_SERIAL_PXA=y

CONFIG_SERIAL_PXA_CONSOLE=y

# CONFIG_LEGACY_PTYS is not set

# CONFIG_HW_RANDOM is not set

CONFIG_I2C=y

CONFIG_I2C_PXA=y

CONFIG_SPI=y

CONFIG_SPI_GPIO=y

CONFIG_GPIO_SYSFS=y

CONFIG_GPIO_PCA953X=y

# CONFIG_HWMON is not set

CONFIG_PMIC_DA903X=y

CONFIG_REGULATOR=y
@@ -102,7 +99,6 @@ CONFIG_LCD_CLASS_DEVICE=y 
CONFIG_LCD_TDO24M=y

# CONFIG_BACKLIGHT_GENERIC is not set

CONFIG_BACKLIGHT_DA903X=m

# CONFIG_VGA_CONSOLE is not set

CONFIG_FRAMEBUFFER_CONSOLE=y

CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y

CONFIG_FONTS=y
@@ -131,7 +127,6 @@ CONFIG_HID_GREENASIA=y 
CONFIG_HID_SMARTJOYPLUS=y

CONFIG_HID_TOPSEED=y

CONFIG_HID_THRUSTMASTER=y

CONFIG_HID_WACOM=m

CONFIG_HID_ZEROPLUS=y

CONFIG_USB=y

CONFIG_USB_DEVICEFS=y
@@ -152,7 +147,6 @@ CONFIG_RTC_DRV_PXA=y 
CONFIG_EXT2_FS=y

CONFIG_EXT3_FS=y

# CONFIG_EXT3_FS_XATTR is not set

CONFIG_INOTIFY=y

CONFIG_MSDOS_FS=m

CONFIG_VFAT_FS=m

CONFIG_TMPFS=y
@@ -164,7 +158,6 @@ CONFIG_NFS_V3=y 
CONFIG_NFS_V3_ACL=y

CONFIG_NFS_V4=y

CONFIG_ROOT_NFS=y

CONFIG_SMB_FS=m

CONFIG_CIFS=m

CONFIG_CIFS_WEAK_PW_HASH=y

CONFIG_PARTITION_ADVANCED=y
@@ -172,9 +165,7 @@ CONFIG_NLS_CODEPAGE_437=m 
CONFIG_NLS_ISO8859_1=m

CONFIG_DEBUG_FS=y

CONFIG_DEBUG_KERNEL=y

# CONFIG_DETECT_SOFTLOCKUP is not set

# CONFIG_SCHED_DEBUG is not set

# CONFIG_RCU_CPU_STALL_DETECTOR is not set

CONFIG_SYSCTL_SYSCALL_CHECK=y

# CONFIG_FTRACE is not set

CONFIG_DEBUG_USER=y
@@ -182,7 +173,6 @@ CONFIG_DEBUG_LL=y 
CONFIG_CRYPTO_ECB=m

CONFIG_CRYPTO_MICHAEL_MIC=m

CONFIG_CRYPTO_AES=m

CONFIG_CRYPTO_ARC4=m

# CONFIG_CRYPTO_ANSI_CPRNG is not set

# CONFIG_CRYPTO_HW is not set

CONFIG_CRC_T10DIF=y

arch/arm/include/asm/hardware/scoop.h

+0 −1
Original line number Diff line number Diff line
@@ -61,7 +61,6 @@ struct scoop_pcmcia_dev { 
struct scoop_pcmcia_config {

	struct scoop_pcmcia_dev *devs;

	int num_devs;

	void (*pcmcia_init)(void);

	void (*power_ctrl)(struct device *scoop, unsigned short cpr, int nr);

};

arch/arm/mach-davinci/board-dm646x-evm.c

+6 −11
Original line number Diff line number Diff line
@@ -719,9 +719,15 @@ static void __init cdce_clk_init(void) 
	}

}



#define DM6467T_EVM_REF_FREQ		33000000



static void __init davinci_map_io(void)

{

	dm646x_init();



	if (machine_is_davinci_dm6467tevm())

		davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);



	cdce_clk_init();

}
@@ -785,17 +791,6 @@ static __init void evm_init(void) 
	soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;

}



#define DM646X_EVM_REF_FREQ		27000000

#define DM6467T_EVM_REF_FREQ		33000000



void __init dm646x_board_setup_refclk(struct clk *clk)

{

	if (machine_is_davinci_dm6467tevm())

		clk->rate = DM6467T_EVM_REF_FREQ;

	else

		clk->rate = DM646X_EVM_REF_FREQ;

}



MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")

	.boot_params  = (0x80000100),

	.map_io       = davinci_map_io,

arch/arm/mach-davinci/clock.c

+38 −0
Original line number Diff line number Diff line
@@ -368,6 +368,12 @@ static unsigned long clk_leafclk_recalc(struct clk *clk) 
	return clk->parent->rate;

}



int davinci_simple_set_rate(struct clk *clk, unsigned long rate)

{

	clk->rate = rate;

	return 0;

}



static unsigned long clk_pllclk_recalc(struct clk *clk)

{

	u32 ctrl, mult = 1, prediv = 1, postdiv = 1;
@@ -506,6 +512,38 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, 
}

EXPORT_SYMBOL(davinci_set_pllrate);



/**

 * davinci_set_refclk_rate() - Set the reference clock rate

 * @rate:	The new rate.

 *

 * Sets the reference clock rate to a given value. This will most likely

 * result in the entire clock tree getting updated.

 *

 * This is used to support boards which use a reference clock different

 * than that used by default in <soc>.c file. The reference clock rate

 * should be updated early in the boot process; ideally soon after the

 * clock tree has been initialized once with the default reference clock

 * rate (davinci_common_init()).

 *

 * Returns 0 on success, error otherwise.

 */

int davinci_set_refclk_rate(unsigned long rate)

{

	struct clk *refclk;



	refclk = clk_get(NULL, "ref");

	if (IS_ERR(refclk)) {

		pr_err("%s: failed to get reference clock.\n", __func__);

		return PTR_ERR(refclk);

	}



	clk_set_rate(refclk, rate);



	clk_put(refclk);



	return 0;

}



int __init davinci_clk_init(struct clk_lookup *clocks)

  {

	struct clk_lookup *c;