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Commit ae176775 authored by Jishnu Prakash's avatar Jishnu Prakash
Browse files

iio: adc: Increase VADC polling delay for EOC to 300ms 



Typically, after requesting a conversion, VADC driver waits for
100ms for end of conversion (EOC) interrupt and in case interrupt
is not received, it polls for EOC status bit to be set, for 50ms.
If QG ESR measurement (with higher priority than SW requests) is
done, ADC is occupied for near 200ms, causing any concurrent
SW reads to time out.

Increase polling delay after waiting for EOC interrupt to 300ms
to ensure enough time for SW reads to complete.

Change-Id: I027d4c363d7ffd19d394353dee7b9d4f764d02c5
Signed-off-by: default avatarJishnu Prakash <jprakash@codeaurora.org>
parent f94ba33e

drivers/iio/adc/qcom-spmi-adc5.c

+5 −5
Original line number Diff line number Diff line
@@ -78,10 +78,10 @@ 
 * clock rate, fast average samples with no measurement in queue.

 * Set the timeout to a max of 100ms.

 */

#define ADC_CONV_TIME_MIN_US			263

#define ADC_CONV_TIME_MAX_US			264

#define ADC_CONV_TIME_RETRY_POLL		570

#define ADC_CONV_TIME_RETRY				190

#define ADC_POLL_DELAY_MIN_US			10000

#define ADC_POLL_DELAY_MAX_US			10001

#define ADC_CONV_TIME_RETRY_POLL		40

#define ADC_CONV_TIME_RETRY			30

#define ADC_CONV_TIMEOUT			msecs_to_jiffies(100)



/* CAL peripheral */
@@ -288,7 +288,7 @@ static int adc_poll_wait_eoc(struct adc_chip *adc, bool poll_only) 
		status1 &= ADC_USR_STATUS1_REQ_STS_EOC_MASK;

		if (status1 == ADC_USR_STATUS1_EOC)

			return 0;

		usleep_range(ADC_CONV_TIME_MIN_US, ADC_CONV_TIME_MAX_US);

		usleep_range(ADC_POLL_DELAY_MIN_US, ADC_POLL_DELAY_MAX_US);

	}



	return -ETIMEDOUT;