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Commit ae0cda2f authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'omap-for-v3.16/prcm-signed' of... 

Merge tag 'omap-for-v3.16/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup

Merge "ARM: omap prcm changes for v3.16 merge window" from Tony Lindgren:

PRCM changes for omaps. I ended up merging these with the
big endian changes because of the merge conflicts for read
and write operations. Via Paul Walmsley <paul@pwsan.com>:

Some OMAP PRCM cleanup patches.  These help prepare to convert the PRCM
code into drivers.

Basic build, boot, and PM test results are available here:

http://www.pwsan.com/omap/testlogs/prcm-cleanup-v3.16/20140515213244/

* tag 'omap-for-v3.16/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: OMAP4: PRCM: remove references to cm-regbits-44xx.h from PRCM core files
  ARM: OMAP3/4: PRM: add support of late_init call to prm_ll_ops
  ARM: OMAP3/OMAP4: PRM: add prm_features flags and add IO wakeup under it
  ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup
  ARM: OMAP2+: PRM: remove unnecessary cpu_is_XXX calls from prm_init / exit
  ARM: OMAP2+: PRCM: cleanup some header includes
  ARM: OMAP4: CM: use cm_base* in register address calculations
  ARM: OMAP2/3: CM: remove some external dependencies
  ARM: OMAP2+: prcm: add omap_test_timeout to prcm-common.h
  ARM: OMAP3: CM: remove a few OMAP34XX_CM_REGADDR defines
  ARM: OMAP: debug-leds: raw read and write endian fix
  ARM: OMAP: counter-32k: raw read and write endian fix
  ARM: OMAP: dmtimer: raw read and write endian fix
  ARM: OMAP2+: raw read and write endian fix

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents b33cdd28 ea351c16

arch/arm/mach-omap2/board-flash.c

+2 −2
Original line number Diff line number Diff line
@@ -160,13 +160,13 @@ static u8 get_gpmc0_type(void) 
	if (!fpga_map_addr)

		return -ENOMEM;



	if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))

	if (!(readw_relaxed(fpga_map_addr + REG_FPGA_REV)))

		/* we dont have an DEBUG FPGA??? */

		/* Depend on #defines!! default to strata boot return param */

		goto unmap;



	/* S8-DIP-OFF = 1, S8-DIP-ON = 0 */

	cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;

	cs = readw_relaxed(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;



	/* ES2.0 SDP's onwards 4 dip switches are provided for CS */

	if (omap_rev() >= OMAP3430_REV_ES1_0)

arch/arm/mach-omap2/clkt2xxx_dpllcore.c

+1 −1
Original line number Diff line number Diff line
@@ -138,7 +138,7 @@ int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate, 
		if (!dd)

			return -EINVAL;



		tmpset.cm_clksel1_pll = __raw_readl(dd->mult_div1_reg);

		tmpset.cm_clksel1_pll = readl_relaxed(dd->mult_div1_reg);

		tmpset.cm_clksel1_pll &= ~(dd->mult_mask |

					   dd->div1_mask);

		div = ((curr_prcm_set->xtal_speed / 1000000) - 1);

arch/arm/mach-omap2/clkt2xxx_osc.c

+4 −4
Original line number Diff line number Diff line
@@ -39,9 +39,9 @@ int omap2_enable_osc_ck(struct clk_hw *clk) 
{

	u32 pcc;



	pcc = __raw_readl(prcm_clksrc_ctrl);

	pcc = readl_relaxed(prcm_clksrc_ctrl);



	__raw_writel(pcc & ~OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);

	writel_relaxed(pcc & ~OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);



	return 0;

}
@@ -57,9 +57,9 @@ void omap2_disable_osc_ck(struct clk_hw *clk) 
{

	u32 pcc;



	pcc = __raw_readl(prcm_clksrc_ctrl);

	pcc = readl_relaxed(prcm_clksrc_ctrl);



	__raw_writel(pcc | OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);

	writel_relaxed(pcc | OMAP_AUTOEXTCLKMODE_MASK, prcm_clksrc_ctrl);

}



unsigned long omap2_osc_clk_recalc(struct clk_hw *clk,

arch/arm/mach-omap2/clkt2xxx_sys.c

+1 −1
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ u32 omap2xxx_get_sysclkdiv(void) 
{

	u32 div;



	div = __raw_readl(prcm_clksrc_ctrl);

	div = readl_relaxed(prcm_clksrc_ctrl);

	div &= OMAP_SYSCLKDIV_MASK;

	div >>= OMAP_SYSCLKDIV_SHIFT;

arch/arm/mach-omap2/clockdomain.h

+2 −1
Original line number Diff line number Diff line
@@ -18,7 +18,6 @@ 


#include "powerdomain.h"

#include "clock.h"

#include "omap_hwmod.h"



/*

 * Clockdomain flags
@@ -98,6 +97,8 @@ struct clkdm_dep { 
/* Possible flags for struct clockdomain._flags */

#define _CLKDM_FLAG_HWSUP_ENABLED		BIT(0)



struct omap_hwmod;



/**

 * struct clockdomain - OMAP clockdomain

 * @name: clockdomain name