Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ada0cc63 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'amlogic-dt' of... 

Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Amlogic 32-bit DT changes for v4.13:
- minor reorganization to support different busses
- add/use real clock controller

* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic

:
  ARM: dts: meson8: add and use the real clock controller
  ARM: dts: meson: Extend L2 cache controller node for Meson8 and Meson8b
  ARM: dts: meson8b: inherit meson.dtsi from meson8b.dtsi
  ARM: dts: meson: organize devices in their corresponding busses

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 392366c3 2c323c43

arch/arm/boot/dts/meson.dtsi

+92 −86
Original line number Diff line number Diff line
@@ -65,101 +65,109 @@ 
		#interrupt-cells = <3>;

	};



	timer@c1109940 {

		compatible = "amlogic,meson6-timer";

		reg = <0xc1109940 0x18>;

		interrupts = <0 10 1>;

	};



	soc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		wdt: watchdog@c1109900 {

			compatible = "amlogic,meson6-wdt";

			reg = <0xc1109900 0x8>;

			interrupts = <0 0 1>;

		};

		cbus: cbus@c1100000 {

			compatible = "simple-bus";

			reg = <0xc1100000 0x200000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0xc1100000 0x200000>;



		uart_AO: serial@c81004c0 {

			uart_A: serial@84c0 {

				compatible = "amlogic,meson-uart";

			reg = <0xc81004c0 0x18>;

			interrupts = <0 90 1>;

			clocks = <&clk81>;

				reg = <0x84c0 0x18>;

				interrupts = <0 26 1>;

				status = "disabled";

			};



		uart_A: serial@c11084c0 {

			uart_B: serial@84dc {

				compatible = "amlogic,meson-uart";

			reg = <0xc11084c0 0x18>;

			interrupts = <0 26 1>;

			clocks = <&clk81>;

				reg = <0x84dc 0x18>;

				interrupts = <0 75 1>;

				status = "disabled";

			};



		uart_B: serial@c11084dc {

			compatible = "amlogic,meson-uart";

			reg = <0xc11084dc 0x18>;

			interrupts = <0 75 1>;

			clocks = <&clk81>;

			i2c_A: i2c@8500 {

				compatible = "amlogic,meson6-i2c";

				reg = <0x8500 0x20>;

				interrupts = <0 21 1>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";

			};



		uart_C: serial@c1108700 {

			uart_C: serial@8700 {

				compatible = "amlogic,meson-uart";

			reg = <0xc1108700 0x18>;

				reg = <0x8700 0x18>;

				interrupts = <0 93 1>;

			clocks = <&clk81>;

				status = "disabled";

			};



		i2c_AO: i2c@c8100500 {

			i2c_B: i2c@87c0 {

				compatible = "amlogic,meson6-i2c";

			reg = <0xc8100500 0x20>;

			interrupts = <0 92 1>;

			clocks = <&clk81>;

				reg = <0x87c0 0x20>;

				interrupts = <0 128 1>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";

			};



		i2c_A: i2c@c1108500 {

			compatible = "amlogic,meson6-i2c";

			reg = <0xc1108500 0x20>;

			interrupts = <0 21 1>;

			clocks = <&clk81>;

			spifc: spi@8c80 {

				compatible = "amlogic,meson6-spifc";

				reg = <0x8c80 0x80>;

				#address-cells = <1>;

				#size-cells = <0>;

				status = "disabled";

			};



		i2c_B: i2c@c11087c0 {

			compatible = "amlogic,meson6-i2c";

			reg = <0xc11087c0 0x20>;

			interrupts = <0 128 1>;

			clocks = <&clk81>;

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

			wdt: watchdog@9900 {

				compatible = "amlogic,meson6-wdt";

				reg = <0x9900 0x8>;

				interrupts = <0 0 1>;

			};



		ir_receiver: ir-receiver@c8100480 {

			timer@9940 {

				compatible = "amlogic,meson6-timer";

				reg = <0x9940 0x18>;

				interrupts = <0 10 1>;

			};

		};



		aobus: aobus@c8100000 {

			compatible = "simple-bus";

			reg = <0xc8100000 0x100000>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0x0 0xc8100000 0x100000>;



			ir_receiver: ir-receiver@480 {

				compatible= "amlogic,meson6-ir";

			reg = <0xc8100480 0x20>;

				reg = <0x480 0x20>;

				interrupts = <0 15 1>;

				status = "disabled";

			};



		spifc: spi@c1108c80 {

			compatible = "amlogic,meson6-spifc";

			reg = <0xc1108c80 0x80>;

			uart_AO: serial@4c0 {

				compatible = "amlogic,meson-uart";

				reg = <0x4c0 0x18>;

				interrupts = <0 90 1>;

				status = "disabled";

			};



			i2c_AO: i2c@500 {

				compatible = "amlogic,meson6-i2c";

				reg = <0x500 0x20>;

				interrupts = <0 92 1>;

				#address-cells = <1>;

				#size-cells = <0>;

			clocks = <&clk81>;

				status = "disabled";

			};

		};



		ethmac: ethernet@c9410000 {

			compatible = "amlogic,meson6-dwmac", "snps,dwmac";
@@ -167,8 +175,6 @@ 
			       0xc1108108 0x4>;

			interrupts = <0 8 1>;

			interrupt-names = "macirq";

			clocks = <&clk81>;

			clock-names = "stmmaceth";

			status = "disabled";

		};

	};

arch/arm/boot/dts/meson6.dtsi

+0 −2
Original line number Diff line number Diff line
@@ -51,8 +51,6 @@ 
	model = "Amlogic Meson6 SoC";

	compatible = "amlogic,meson6";



	interrupt-parent = <&gic>;



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;

arch/arm/boot/dts/meson8.dtsi

+92 −46
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ 
 *     OTHER DEALINGS IN THE SOFTWARE.

 */



#include <dt-bindings/clock/meson8b-clkc.h>

#include <dt-bindings/gpio/meson8-gpio.h>

/include/ "meson.dtsi"
@@ -50,8 +51,6 @@ 
	model = "Amlogic Meson8 SoC";

	compatible = "amlogic,meson8";



	interrupt-parent = <&gic>;



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -84,25 +83,61 @@ 
			reg = <0x203>;

		};

	};

}; /* end of / */



&aobus {

	pinctrl_aobus: pinctrl@84 {

		compatible = "amlogic,meson8-aobus-pinctrl";

		reg = <0x84 0xc>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		gpio_ao: ao-bank@14 {

			reg = <0x14 0x4>,

			      <0x2c 0x4>,

			      <0x24 0x8>;

			reg-names = "mux", "pull", "gpio";

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pinctrl_aobus 0 120 16>;

		};



		uart_ao_a_pins: uart_ao_a {

			mux {

				groups = "uart_tx_ao_a", "uart_rx_ao_a";

				function = "uart_ao";

			};

		};



		i2c_ao_pins: i2c_mst_ao {

			mux {

				groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao";

				function = "i2c_mst_ao";

			};

		};

	};

};



	clk81: clk@0 {

		#clock-cells = <0>;

		compatible = "fixed-clock";

		clock-frequency = <141666666>;

&cbus {

	clkc: clock-controller@4000 {

		#clock-cells = <1>;

		compatible = "amlogic,meson8-clkc";

		reg = <0x8000 0x4>, <0x4000 0x460>;

	};



	pinctrl_cbus: pinctrl@c1109880 {

	pinctrl_cbus: pinctrl@9880 {

		compatible = "amlogic,meson8-cbus-pinctrl";

		reg = <0xc1109880 0x10>;

		reg = <0x9880 0x10>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		gpio: banks@c11080b0 {

			reg = <0xc11080b0 0x28>,

			      <0xc11080e8 0x18>,

			      <0xc1108120 0x18>,

			      <0xc1108030 0x30>;

		gpio: banks@80b0 {

			reg = <0x80b0 0x28>,

			      <0x80e8 0x18>,

			      <0x8120 0x18>,

			      <0x8030 0x30>;

			reg-names = "mux", "pull", "pull-enable", "gpio";

			gpio-controller;

			#gpio-cells = <2>;
@@ -134,36 +169,47 @@ 
			};

		};

	};

};



	pinctrl_aobus: pinctrl@c8100084 {

		compatible = "amlogic,meson8-aobus-pinctrl";

		reg = <0xc8100084 0xc>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

&ethmac {

	clocks = <&clkc CLKID_CLK81>;

	clock-names = "stmmaceth";

};



		gpio_ao: ao-bank@c1108030 {

			reg = <0xc8100014 0x4>,

			      <0xc810002c 0x4>,

			      <0xc8100024 0x8>;

			reg-names = "mux", "pull", "gpio";

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pinctrl_aobus 0 120 16>;

&i2c_AO {

	clocks = <&clkc CLKID_CLK81>;

};



		uart_ao_a_pins: uart_ao_a {

			mux {

				groups = "uart_tx_ao_a", "uart_rx_ao_a";

				function = "uart_ao";

&i2c_A {

	clocks = <&clkc CLKID_CLK81>;

};



&i2c_B {

	clocks = <&clkc CLKID_CLK81>;

};



		i2c_ao_pins: i2c_mst_ao {

			mux {

				groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao";

				function = "i2c_mst_ao";

&L2 {

	arm,data-latency = <3 3 3>;

	arm,tag-latency = <2 2 2>;

	arm,filter-ranges = <0x100000 0xc0000000>;

};



&spifc {

	clocks = <&clkc CLKID_CLK81>;

};



&uart_AO {

	clocks = <&clkc CLKID_CLK81>;

};



&uart_A {

	clocks = <&clkc CLKID_CLK81>;

};



&uart_B {

	clocks = <&clkc CLKID_CLK81>;

};



&uart_C {

	clocks = <&clkc CLKID_CLK81>;

};
 
}; /* end of / */

arch/arm/boot/dts/meson8b.dtsi

+89 −125
Original line number Diff line number Diff line
@@ -47,11 +47,9 @@ 
#include <dt-bindings/clock/meson8b-clkc.h>

#include <dt-bindings/gpio/meson8b-gpio.h>

#include <dt-bindings/reset/amlogic,meson8b-reset.h>

#include "skeleton.dtsi"

#include "meson.dtsi"



/ {

	interrupt-parent = <&gic>;



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -84,147 +82,113 @@ 
			reg = <0x203>;

		};

	};

}; /* end of / */



	soc {

		compatible = "simple-bus";

&aobus {

	pinctrl_aobus: pinctrl@84 {

		compatible = "amlogic,meson8b-aobus-pinctrl";

		reg = <0x84 0xc>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		L2: l2-cache-controller@c4200000 {

			compatible = "arm,pl310-cache";

			reg = <0xc4200000 0x1000>;

			cache-unified;

			cache-level = <2>;

		};



		gic: interrupt-controller@c4301000 {

			compatible = "arm,cortex-a9-gic";

			reg = <0xc4301000 0x1000>,

			      <0xc4300100 0x0100>;

			interrupt-controller;

			#interrupt-cells = <3>;

		};



		reset: reset-controller@c1104404 {

			compatible = "amlogic,meson8b-reset";

			reg = <0xc1104404 0x20>;

			#reset-cells = <1>;

		};



		wdt: watchdog@c1109900 {

			compatible = "amlogic,meson8b-wdt";

			reg = <0xc1109900 0x8>;

			interrupts = <0 0 1>;

		};



		timer@c1109940 {

			compatible = "amlogic,meson6-timer";

			reg = <0xc1109940 0x18>;

			interrupts = <0 10 1>;

		gpio_ao: ao-bank@14 {

			reg = <0x14 0x4>,

				<0x2c 0x4>,

				<0x24 0x8>;

			reg-names = "mux", "pull", "gpio";

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pinctrl_aobus 0 130 16>;

		};



		uart_AO: serial@c81004c0 {

			compatible = "amlogic,meson-uart";

			reg = <0xc81004c0 0x18>;

			interrupts = <0 90 1>;

			clocks = <&clkc CLKID_CLK81>;

			status = "disabled";

		uart_ao_a_pins: uart_ao_a {

			mux {

				groups = "uart_tx_ao_a", "uart_rx_ao_a";

				function = "uart_ao";

			};



		uart_A: serial@c11084c0 {

			compatible = "amlogic,meson-uart";

			reg = <0xc11084c0 0x18>;

			interrupts = <0 26 1>;

			clocks = <&clkc CLKID_CLK81>;

			status = "disabled";

		};



		uart_B: serial@c11084dc {

			compatible = "amlogic,meson-uart";

			reg = <0xc11084dc 0x18>;

			interrupts = <0 75 1>;

			clocks = <&clkc CLKID_CLK81>;

			status = "disabled";

	};



		uart_C: serial@c1108700 {

			compatible = "amlogic,meson-uart";

			reg = <0xc1108700 0x18>;

			interrupts = <0 93 1>;

			clocks = <&clkc CLKID_CLK81>;

			status = "disabled";

};



		clkc: clock-controller@c1104000 {

&cbus {

	clkc: clock-controller@4000 {

		#clock-cells = <1>;

		compatible = "amlogic,meson8b-clkc";

			reg = <0xc1108000 0x4>, <0xc1104000 0x460>;

		reg = <0x8000 0x4>, <0x4000 0x460>;

	};



	reset: reset-controller@4404 {

		compatible = "amlogic,meson8b-reset";

		reg = <0x4404 0x20>;

		#reset-cells = <1>;

	};



	pwm_ab: pwm@8550 {

		compatible = "amlogic,meson8b-pwm";

			reg = <0xc1108550 0x10>;

		reg = <0x8550 0x10>;

		#pwm-cells = <3>;

		status = "disabled";

	};



	pwm_cd: pwm@8650 {

		compatible = "amlogic,meson8b-pwm";

			reg = <0xc1108650 0x10>;

		reg = <0x8650 0x10>;

		#pwm-cells = <3>;

		status = "disabled";

	};



	pwm_ef: pwm@86c0 {

		compatible = "amlogic,meson8b-pwm";

			reg = <0xc11086c0 0x10>;

		reg = <0x86c0 0x10>;

		#pwm-cells = <3>;

		status = "disabled";

	};



		pinctrl_cbus: pinctrl@c1109880 {

	wdt: watchdog@9900 {

		compatible = "amlogic,meson8b-wdt";

		reg = <0x9900 0x8>;

		interrupts = <0 0 1>;

	};



	pinctrl_cbus: pinctrl@9880 {

		compatible = "amlogic,meson8b-cbus-pinctrl";

			reg = <0xc1109880 0x10>;

		reg = <0x9880 0x10>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



			gpio: banks@c11080b0 {

				reg = <0xc11080b0 0x28>,

				      <0xc11080e8 0x18>,

				      <0xc1108120 0x18>,

				      <0xc1108030 0x38>;

		gpio: banks@80b0 {

			reg = <0x80b0 0x28>,

				<0x80e8 0x18>,

				<0x8120 0x18>,

				<0x8030 0x38>;

			reg-names = "mux", "pull", "pull-enable", "gpio";

			gpio-controller;

			#gpio-cells = <2>;

			gpio-ranges = <&pinctrl_cbus 0 0 130>;

		};

	};

};



		pinctrl_aobus: pinctrl@c8100084 {

			compatible = "amlogic,meson8b-aobus-pinctrl";

			reg = <0xc8100084 0xc>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			gpio_ao: ao-bank@c1108030 {

				reg = <0xc8100014 0x4>,

				      <0xc810002c 0x4>,

				      <0xc8100024 0x8>;

				reg-names = "mux", "pull", "gpio";

				gpio-controller;

				#gpio-cells = <2>;

				gpio-ranges = <&pinctrl_aobus 0 130 16>;

&L2 {

	arm,data-latency = <3 3 3>;

	arm,tag-latency = <2 2 2>;

	arm,filter-ranges = <0x100000 0xc0000000>;

};



			uart_ao_a_pins: uart_ao_a {

				mux {

					groups = "uart_tx_ao_a", "uart_rx_ao_a";

					function = "uart_ao";

&uart_AO {

	clocks = <&clkc CLKID_CLK81>;

};



&uart_A {

	clocks = <&clkc CLKID_CLK81>;

};



&uart_B {

	clocks = <&clkc CLKID_CLK81>;

};



&uart_C {

	clocks = <&clkc CLKID_CLK81>;

};
 
}; /* end of / */