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Commit acfc3e34 authored by Shawn Guo's avatar Shawn Guo Committed by Thierry Reding
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dt-bindings: pwm: Add bindings doc for ZTE ZX PWM controller 



It adds bindings document for ZTE ZX PWM controller. The device has two
clocks: PCLK and WCLK. The PCLK is for register access, and WCLK is the
reference clock for calculating period and duty cycles. Also, the device
supports polarity configuration, so #pwm-cells should be 3.

Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent 8a88b2a2

Documentation/devicetree/bindings/pwm/pwm-zx.txt

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ZTE ZX PWM controller



Required properties:

 - compatible: Should be "zte,zx296718-pwm".

 - reg: Physical base address and length of the controller's registers.

 - clocks : The phandle and specifier referencing the controller's clocks.

 - clock-names: "pclk" for PCLK, "wclk" for WCLK to the PWM controller.  The

   PCLK is for register access, while WCLK is the reference clock for

   calculating period and duty cycles.

 - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of

   the cells format.



Example:



	pwm: pwm@1439000 {

		compatible = "zte,zx296718-pwm";

		reg = <0x1439000 0x1000>;

		clocks = <&lsp1crm LSP1_PWM_PCLK>,

			 <&lsp1crm LSP1_PWM_WCLK>;

		clock-names = "pclk", "wclk";

		#pwm-cells = <3>;

	};