Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ac32378f authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'phy-broadcom-wirespeed-downshift-support' 



Florian Fainelli says:

====================
net: phy: broadcom: Wirespeed/downshift support

This patch series adds support for the Broadcom Wirespeed, aka
downsfhit feature utilizing the recently added ethtool PHY tunables.

Tested with two Gigabit link partners with a 4-wire cable having only
2 pairs connected.

Last patch in the series is a fix that was required for testing, which
should make it to -stable, which I can submit separate against net if
you prefer David.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents f8071cde 30ce0de4

drivers/net/dsa/bcm_sf2.c

+4 −0
Original line number Diff line number Diff line
@@ -588,6 +588,7 @@ static void bcm_sf2_sw_adjust_link(struct dsa_switch *ds, int port, 
				   struct phy_device *phydev)

{

	struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);

	struct ethtool_eee *p = &priv->port_sts[port].eee;

	u32 id_mode_dis = 0, port_mode;

	const char *str = NULL;

	u32 reg;
@@ -662,6 +663,9 @@ static void bcm_sf2_sw_adjust_link(struct dsa_switch *ds, int port, 
		reg |= DUPLX_MODE;



	core_writel(priv, reg, CORE_STS_OVERRIDE_GMIIP_PORT(port));



	if (!phydev->is_pseudo_fixed_link)

		p->eee_enabled = bcm_sf2_eee_init(ds, port, phydev);

}



static void bcm_sf2_sw_fixed_link_update(struct dsa_switch *ds, int port,

drivers/net/phy/bcm-cygnus.c

+1 −1
Original line number Diff line number Diff line
@@ -104,7 +104,7 @@ static int bcm_cygnus_config_init(struct phy_device *phydev) 
		return rc;



	/* Advertise EEE */

	rc = bcm_phy_enable_eee(phydev);

	rc = bcm_phy_set_eee(phydev, true);

	if (rc)

		return rc;

drivers/net/phy/bcm-phy-lib.c

+113 −4
Original line number Diff line number Diff line
@@ -50,6 +50,23 @@ int bcm_phy_read_exp(struct phy_device *phydev, u16 reg) 
}

EXPORT_SYMBOL_GPL(bcm_phy_read_exp);



int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum)

{

	/* The register must be written to both the Shadow Register Select and

	 * the Shadow Read Register Selector

	 */

	phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum |

		  regnum << MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT);

	return phy_read(phydev, MII_BCM54XX_AUX_CTL);

}

EXPORT_SYMBOL_GPL(bcm54xx_auxctl_read);



int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val)

{

	return phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | val);

}

EXPORT_SYMBOL(bcm54xx_auxctl_write);



int bcm_phy_write_misc(struct phy_device *phydev,

		       u16 reg, u16 chl, u16 val)

{
@@ -178,7 +195,7 @@ int bcm_phy_enable_apd(struct phy_device *phydev, bool dll_pwr_down) 
}

EXPORT_SYMBOL_GPL(bcm_phy_enable_apd);



int bcm_phy_enable_eee(struct phy_device *phydev)

int bcm_phy_set_eee(struct phy_device *phydev, bool enable)

{

	int val;
@@ -188,7 +205,10 @@ int bcm_phy_enable_eee(struct phy_device *phydev) 
	if (val < 0)

		return val;



	if (enable)

		val |= LPI_FEATURE_EN | LPI_FEATURE_EN_DIG1000X;

	else

		val &= ~(LPI_FEATURE_EN | LPI_FEATURE_EN_DIG1000X);



	phy_write_mmd_indirect(phydev, BRCM_CL45VEN_EEE_CONTROL,

			       MDIO_MMD_AN, (u32)val);
@@ -199,14 +219,103 @@ int bcm_phy_enable_eee(struct phy_device *phydev) 
	if (val < 0)

		return val;



	if (enable)

		val |= (MDIO_AN_EEE_ADV_100TX | MDIO_AN_EEE_ADV_1000T);

	else

		val &= ~(MDIO_AN_EEE_ADV_100TX | MDIO_AN_EEE_ADV_1000T);



	phy_write_mmd_indirect(phydev, BCM_CL45VEN_EEE_ADV,

			       MDIO_MMD_AN, (u32)val);



	return 0;

}

EXPORT_SYMBOL_GPL(bcm_phy_enable_eee);

EXPORT_SYMBOL_GPL(bcm_phy_set_eee);



int bcm_phy_downshift_get(struct phy_device *phydev, u8 *count)

{

	int val;



	val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);

	if (val < 0)

		return val;



	/* Check if wirespeed is enabled or not */

	if (!(val & MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN)) {

		*count = DOWNSHIFT_DEV_DISABLE;

		return 0;

	}



	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR2);

	if (val < 0)

		return val;



	/* Downgrade after one link attempt */

	if (val & BCM54XX_SHD_SCR2_WSPD_RTRY_DIS) {

		*count = 1;

	} else {

		/* Downgrade after configured retry count */

		val >>= BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT;

		val &= BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_MASK;

		*count = val + BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET;

	}



	return 0;

}

EXPORT_SYMBOL_GPL(bcm_phy_downshift_get);



int bcm_phy_downshift_set(struct phy_device *phydev, u8 count)

{

	int val = 0, ret = 0;



	/* Range check the number given */

	if (count - BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET >

	    BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_MASK &&

	    count != DOWNSHIFT_DEV_DEFAULT_COUNT) {

		return -ERANGE;

	}



	val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);

	if (val < 0)

		return val;



	/* Se the write enable bit */

	val |= MII_BCM54XX_AUXCTL_MISC_WREN;



	if (count == DOWNSHIFT_DEV_DISABLE) {

		val &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN;

		return bcm54xx_auxctl_write(phydev,

					    MII_BCM54XX_AUXCTL_SHDWSEL_MISC,

					    val);

	} else {

		val |= MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN;

		ret = bcm54xx_auxctl_write(phydev,

					   MII_BCM54XX_AUXCTL_SHDWSEL_MISC,

					   val);

		if (ret < 0)

			return ret;

	}



	val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR2);

	val &= ~(BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_MASK <<

		 BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT |

		 BCM54XX_SHD_SCR2_WSPD_RTRY_DIS);



	switch (count) {

	case 1:

		val |= BCM54XX_SHD_SCR2_WSPD_RTRY_DIS;

		break;

	case DOWNSHIFT_DEV_DEFAULT_COUNT:

		val |= 1 << BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT;

		break;

	default:

		val |= (count - BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET) <<

			BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT;

		break;

	}



	return bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR2, val);

}

EXPORT_SYMBOL_GPL(bcm_phy_downshift_set);



MODULE_DESCRIPTION("Broadcom PHY Library");

MODULE_LICENSE("GPL v2");

drivers/net/phy/bcm-phy-lib.h

+9 −1
Original line number Diff line number Diff line
@@ -19,6 +19,9 @@ 
int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val);

int bcm_phy_read_exp(struct phy_device *phydev, u16 reg);



int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val);

int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum);



int bcm_phy_write_misc(struct phy_device *phydev,

		       u16 reg, u16 chl, u16 value);

int bcm_phy_read_misc(struct phy_device *phydev,
@@ -33,5 +36,10 @@ int bcm_phy_config_intr(struct phy_device *phydev); 


int bcm_phy_enable_apd(struct phy_device *phydev, bool dll_pwr_down);



int bcm_phy_enable_eee(struct phy_device *phydev);

int bcm_phy_set_eee(struct phy_device *phydev, bool enable);



int bcm_phy_downshift_get(struct phy_device *phydev, u8 *count);



int bcm_phy_downshift_set(struct phy_device *phydev, u8 count);



#endif /* _LINUX_BCM_PHY_LIB_H */

drivers/net/phy/bcm7xxx.c

+50 −1
Original line number Diff line number Diff line
@@ -167,6 +167,7 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev) 
{

	u8 rev = PHY_BRCM_7XXX_REV(phydev->dev_flags);

	u8 patch = PHY_BRCM_7XXX_PATCH(phydev->dev_flags);

	u8 count;

	int ret = 0;



	pr_info_once("%s: %s PHY revision: 0x%02x, patch: %d\n",
@@ -199,7 +200,12 @@ static int bcm7xxx_28nm_config_init(struct phy_device *phydev) 
	if (ret)

		return ret;



	ret = bcm_phy_enable_eee(phydev);

	ret = bcm_phy_downshift_get(phydev, &count);

	if (ret)

		return ret;



	/* Only enable EEE if Wirespeed/downshift is disabled */

	ret = bcm_phy_set_eee(phydev, count == DOWNSHIFT_DEV_DISABLE);

	if (ret)

		return ret;
@@ -303,6 +309,47 @@ static int bcm7xxx_suspend(struct phy_device *phydev) 
	return 0;

}



static int bcm7xxx_28nm_get_tunable(struct phy_device *phydev,

				    struct ethtool_tunable *tuna,

				    void *data)

{

	switch (tuna->id) {

	case ETHTOOL_PHY_DOWNSHIFT:

		return bcm_phy_downshift_get(phydev, (u8 *)data);

	default:

		return -EOPNOTSUPP;

	}

}



static int bcm7xxx_28nm_set_tunable(struct phy_device *phydev,

				    struct ethtool_tunable *tuna,

				    const void *data)

{

	u8 count = *(u8 *)data;

	int ret;



	switch (tuna->id) {

	case ETHTOOL_PHY_DOWNSHIFT:

		ret = bcm_phy_downshift_set(phydev, count);

		break;

	default:

		return -EOPNOTSUPP;

	}



	if (ret)

		return ret;



	/* Disable EEE advertisment since this prevents the PHY

	 * from successfully linking up, trigger auto-negotiation restart

	 * to let the MAC decide what to do.

	 */

	ret = bcm_phy_set_eee(phydev, count == DOWNSHIFT_DEV_DISABLE);

	if (ret)

		return ret;



	return genphy_restart_aneg(phydev);

}



#define BCM7XXX_28NM_GPHY(_oui, _name)					\

{									\

	.phy_id		= (_oui),					\
@@ -315,6 +362,8 @@ static int bcm7xxx_suspend(struct phy_device *phydev) 
	.config_aneg	= genphy_config_aneg,				\

	.read_status	= genphy_read_status,				\

	.resume		= bcm7xxx_28nm_resume,				\

	.get_tunable	= bcm7xxx_28nm_get_tunable,			\

	.set_tunable	= bcm7xxx_28nm_set_tunable,			\

}



#define BCM7XXX_40NM_EPHY(_oui, _name)					\