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Commit ab96c1ee authored by Imre Deak's avatar Imre Deak
Browse files

drm/i915/skl: make sure LCPLL is disabled when uniniting CDCLK 



Suppressing LCPLL disabling was added to avoid interfering with the DMC
firmware. It is not needed any more since we uninit CDCLK now with the
DMC deactivated (DC states disabled). We also must disable it during system
suspend as part of the Bspec "Display uninit sequence".

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarPatrik Jakobsson <patrik.jakobsson@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446657859-9598-10-git-send-email-imre.deak@intel.com
parent d26fa1d5

drivers/gpu/drm/i915/intel_display.c

+4 −10
Original line number Diff line number Diff line
@@ -5702,17 +5702,11 @@ void skl_uninit_cdclk(struct drm_i915_private *dev_priv) 
	if (I915_READ(DBUF_CTL) & DBUF_POWER_STATE)

		DRM_ERROR("DBuf power disable timeout\n");



	/*

	 * DMC assumes ownership of LCPLL and will get confused if we touch it.

	 */

	if (dev_priv->csr.dmc_payload) {

	/* disable DPLL0 */

		I915_WRITE(LCPLL1_CTL, I915_READ(LCPLL1_CTL) &

					~LCPLL_PLL_ENABLE);

	I915_WRITE(LCPLL1_CTL, I915_READ(LCPLL1_CTL) & ~LCPLL_PLL_ENABLE);

	if (wait_for(!(I915_READ(LCPLL1_CTL) & LCPLL_PLL_LOCK), 1))

		DRM_ERROR("Couldn't disable DPLL0\n");

}

}



void skl_init_cdclk(struct drm_i915_private *dev_priv)

{