Loading arch/arm/mach-omap2/include/mach/omap4-common.h +0 −2 Original line number Diff line number Diff line Loading @@ -28,8 +28,6 @@ extern void __iomem *l2cache_base; #endif extern void __iomem *gic_dist_base_addr; extern void __init gic_init_irq(void); extern void omap_smc1(u32 fn, u32 arg); Loading arch/arm/mach-omap2/io.c +0 −3 Original line number Diff line number Diff line Loading @@ -316,9 +316,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); } /* See irq.c, omap4-common.c and entry-macro.S */ void __iomem *omap_irq_base; static void __init omap_common_init_early(void) { omap2_check_revision(); Loading arch/arm/mach-omap2/irq.c +1 −0 Original line number Diff line number Diff line Loading @@ -149,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) static void __init omap_init_irq(u32 base, int nr_irqs) { void __iomem *omap_irq_base; unsigned long nr_of_irqs = 0; unsigned int nr_banks = 0; int i, j; Loading arch/arm/mach-omap2/omap4-common.c +3 −3 Original line number Diff line number Diff line Loading @@ -28,11 +28,11 @@ void __iomem *l2cache_base; #endif void __iomem *gic_dist_base_addr; void __init gic_init_irq(void) { void __iomem *omap_irq_base; void __iomem *gic_dist_base_addr; /* Static mapping, never released */ gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); BUG_ON(!gic_dist_base_addr); Loading arch/arm/plat-omap/include/plat/irqs.h +0 −1 Original line number Diff line number Diff line Loading @@ -437,7 +437,6 @@ #define INTCPS_NR_IRQS 96 #ifndef __ASSEMBLY__ extern void __iomem *omap_irq_base; void omap1_init_irq(void); void omap2_init_irq(void); void omap3_init_irq(void); Loading Loading
arch/arm/mach-omap2/include/mach/omap4-common.h +0 −2 Original line number Diff line number Diff line Loading @@ -28,8 +28,6 @@ extern void __iomem *l2cache_base; #endif extern void __iomem *gic_dist_base_addr; extern void __init gic_init_irq(void); extern void omap_smc1(u32 fn, u32 arg); Loading
arch/arm/mach-omap2/io.c +0 −3 Original line number Diff line number Diff line Loading @@ -316,9 +316,6 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); } /* See irq.c, omap4-common.c and entry-macro.S */ void __iomem *omap_irq_base; static void __init omap_common_init_early(void) { omap2_check_revision(); Loading
arch/arm/mach-omap2/irq.c +1 −0 Original line number Diff line number Diff line Loading @@ -149,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) static void __init omap_init_irq(u32 base, int nr_irqs) { void __iomem *omap_irq_base; unsigned long nr_of_irqs = 0; unsigned int nr_banks = 0; int i, j; Loading
arch/arm/mach-omap2/omap4-common.c +3 −3 Original line number Diff line number Diff line Loading @@ -28,11 +28,11 @@ void __iomem *l2cache_base; #endif void __iomem *gic_dist_base_addr; void __init gic_init_irq(void) { void __iomem *omap_irq_base; void __iomem *gic_dist_base_addr; /* Static mapping, never released */ gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); BUG_ON(!gic_dist_base_addr); Loading
arch/arm/plat-omap/include/plat/irqs.h +0 −1 Original line number Diff line number Diff line Loading @@ -437,7 +437,6 @@ #define INTCPS_NR_IRQS 96 #ifndef __ASSEMBLY__ extern void __iomem *omap_irq_base; void omap1_init_irq(void); void omap2_init_irq(void); void omap3_init_irq(void); Loading