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Commit ab182e67 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 updates from Catalin Marinas:

 - kdump support, including two necessary memblock additions:
   memblock_clear_nomap() and memblock_cap_memory_range()

 - ARMv8.3 HWCAP bits for JavaScript conversion instructions, complex
   numbers and weaker release consistency

 - arm64 ACPI platform MSI support

 - arm perf updates: ACPI PMU support, L3 cache PMU in some Qualcomm
   SoCs, Cortex-A53 L2 cache events and DTLB refills, MAINTAINERS update
   for DT perf bindings

 - architected timer errata framework (the arch/arm64 changes only)

 - support for DMA_ATTR_FORCE_CONTIGUOUS in the arm64 iommu DMA API

 - arm64 KVM refactoring to use common system register definitions

 - remove support for ASID-tagged VIVT I-cache (no ARMv8 implementation
   using it and deprecated in the architecture) together with some
   I-cache handling clean-up

 - PE/COFF EFI header clean-up/hardening

 - define BUG() instruction without CONFIG_BUG

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (92 commits)
  arm64: Fix the DMA mmap and get_sgtable API with DMA_ATTR_FORCE_CONTIGUOUS
  arm64: Print DT machine model in setup_machine_fdt()
  arm64: pmu: Wire-up Cortex A53 L2 cache events and DTLB refills
  arm64: module: split core and init PLT sections
  arm64: pmuv3: handle pmuv3+
  arm64: Add CNTFRQ_EL0 trap handler
  arm64: Silence spurious kbuild warning on menuconfig
  arm64: pmuv3: use arm_pmu ACPI framework
  arm64: pmuv3: handle !PMUv3 when probing
  drivers/perf: arm_pmu: add ACPI framework
  arm64: add function to get a cpu's MADT GICC table
  drivers/perf: arm_pmu: split out platform device probe logic
  drivers/perf: arm_pmu: move irq request/free into probe
  drivers/perf: arm_pmu: split cpu-local irq request/free
  drivers/perf: arm_pmu: rename irq request/free functions
  drivers/perf: arm_pmu: handle no platform_device
  drivers/perf: arm_pmu: simplify cpu_pmu_request_irqs()
  drivers/perf: arm_pmu: factor out pmu registration
  drivers/perf: arm_pmu: fold init into alloc
  drivers/perf: arm_pmu: define armpmu_init_fn
  ...
parents 7246f600 92f66f84

Documentation/arm64/cpu-feature-registers.txt

+12 −0
Original line number Diff line number Diff line
@@ -169,6 +169,18 @@ infrastructure: 
   as available on the CPU where it is fetched and is not a system

   wide safe value.



  4) ID_AA64ISAR1_EL1 - Instruction set attribute register 1



     x--------------------------------------------------x

     | Name                         |  bits   | visible |

     |--------------------------------------------------|

     | LRCPC                        | [23-20] |    y    |

     |--------------------------------------------------|

     | FCMA                         | [19-16] |    y    |

     |--------------------------------------------------|

     | JSCVT                        | [15-12] |    y    |

     x--------------------------------------------------x



Appendix I: Example

---------------------------

Documentation/devicetree/bindings/chosen.txt

+45 −0
Original line number Diff line number Diff line
@@ -52,3 +52,48 @@ This property is set (currently only on PowerPC, and only needed on 
book3e) by some versions of kexec-tools to tell the new kernel that it

is being booted by kexec, as the booting environment may differ (e.g.

a different secondary CPU release mechanism)



linux,usable-memory-range

-------------------------



This property (arm64 only) holds a base address and size, describing a

limited region in which memory may be considered available for use by

the kernel. Memory outside of this range is not available for use.



This property describes a limitation: memory within this range is only

valid when also described through another mechanism that the kernel

would otherwise use to determine available memory (e.g. memory nodes

or the EFI memory map). Valid memory may be sparse within the range.

e.g.



/ {

	chosen {

		linux,usable-memory-range = <0x9 0xf0000000 0x0 0x10000000>;

	};

};



The main usage is for crash dump kernel to identify its own usable

memory and exclude, at its boot time, any other memory areas that are

part of the panicked kernel's memory.



While this property does not represent a real hardware, the address

and the size are expressed in #address-cells and #size-cells,

respectively, of the root node.



linux,elfcorehdr

----------------



This property (currently used only on arm64) holds the memory range,

the address and the size, of the elf core header which mainly describes

the panicked kernel's memory layout as PT_LOAD segments of elf format.

e.g.



/ {

	chosen {

		linux,elfcorehdr = <0x9 0xfffff000 0x0 0x800>;

	};

};



While this property does not represent a real hardware, the address

and the size are expressed in #address-cells and #size-cells,

respectively, of the root node.

Documentation/kdump/kdump.txt

+15 −1
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ memory image to a dump file on the local disk, or across the network to 
a remote system.



Kdump and kexec are currently supported on the x86, x86_64, ppc64, ia64,

s390x and arm architectures.

s390x, arm and arm64 architectures.



When the system kernel boots, it reserves a small section of memory for

the dump-capture kernel. This ensures that ongoing Direct Memory Access
@@ -249,6 +249,13 @@ Dump-capture kernel config options (Arch Dependent, arm) 


    AUTO_ZRELADDR=y



Dump-capture kernel config options (Arch Dependent, arm64)

----------------------------------------------------------



- Please note that kvm of the dump-capture kernel will not be enabled

  on non-VHE systems even if it is configured. This is because the CPU

  will not be reset to EL2 on panic.



Extended crashkernel syntax

===========================
@@ -305,6 +312,8 @@ Boot into System Kernel 
   kernel will automatically locate the crash kernel image within the

   first 512MB of RAM if X is not given.



   On arm64, use "crashkernel=Y[@X]".  Note that the start address of

   the kernel, X if explicitly specified, must be aligned to 2MiB (0x200000).



Load the Dump-capture Kernel

============================
@@ -327,6 +336,8 @@ For s390x: 
	- Use image or bzImage

For arm:

	- Use zImage

For arm64:

	- Use vmlinux or Image



If you are using a uncompressed vmlinux image then use following command

to load dump-capture kernel.
@@ -370,6 +381,9 @@ For s390x: 
For arm:

	"1 maxcpus=1 reset_devices"



For arm64:

	"1 maxcpus=1 reset_devices"



Notes on loading the dump-capture kernel:



* By default, the ELF headers are stored in ELF64 format to support

Documentation/perf/qcom_l3_pmu.txt

0 → 100644
+25 −0
Original line number Diff line number Diff line 
Qualcomm Datacenter Technologies L3 Cache Performance Monitoring Unit (PMU)

===========================================================================



This driver supports the L3 cache PMUs found in Qualcomm Datacenter Technologies

Centriq SoCs. The L3 cache on these SOCs is composed of multiple slices, shared

by all cores within a socket. Each slice is exposed as a separate uncore perf

PMU with device name l3cache_<socket>_<instance>. User space is responsible

for aggregating across slices.



The driver provides a description of its available events and configuration

options in sysfs, see /sys/devices/l3cache*. Given that these are uncore PMUs

the driver also exposes a "cpumask" sysfs attribute which contains a mask

consisting of one CPU per socket which will be used to handle all the PMU

events on that socket.



The hardware implements 32bit event counters and has a flat 8bit event space

exposed via the "event" format attribute. In addition to the 32bit physical

counters the driver supports virtual 64bit hardware counters by using hardware

counter chaining. This feature is exposed via the "lc" (long counter) format

flag. E.g.:



  perf stat -e l3cache_0_0/read-miss,lc/



Given that these are uncore PMUs the driver does not support sampling, therefore

"perf record" will not work. Per-task perf sessions are not supported.

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -983,6 +983,7 @@ F: arch/arm*/include/asm/perf_event.h 
F:	drivers/perf/*

F:	include/linux/perf/arm_pmu.h

F:	Documentation/devicetree/bindings/arm/pmu.txt

F:	Documentation/devicetree/bindings/perf/



ARM PORT

M:	Russell King <linux@armlinux.org.uk>