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Commit ab10f1dd authored by Kukjin Kim's avatar Kukjin Kim
Browse files

Merge branch 'dev/cleanup-clocks' into for-next

parents f56d4634 957c461e

arch/arm/mach-s3c64xx/clock.c

+3 −16
Original line number Diff line number Diff line
@@ -127,7 +127,7 @@ int s3c64xx_sclk_ctrl(struct clk *clk, int enable) 
	return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);

}



static struct clk init_clocks_disable[] = {

static struct clk init_clocks_off[] = {

	{

		.name		= "nand",

		.id		= -1,
@@ -834,10 +834,6 @@ static struct clk *clks[] __initdata = { 
void __init s3c64xx_register_clocks(unsigned long xtal, 

				    unsigned armclk_divlimit)

{

	struct clk *clkp;

	int ret;

	int ptr;



	armclk_mask = armclk_divlimit;



	s3c24xx_register_baseclocks(xtal);
@@ -845,17 +841,8 @@ void __init s3c64xx_register_clocks(unsigned long xtal, 


	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));



	clkp = init_clocks_disable;

	for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {



		ret = s3c24xx_register_clock(clkp);

		if (ret < 0) {

			printk(KERN_ERR "Failed to register clock %s (%d)\n",

			       clkp->name, ret);

		}



		(clkp->enable)(clkp, 0);

	}

	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));

	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));



	s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));

	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));

arch/arm/mach-s5p6442/clock.c

+3 −13
Original line number Diff line number Diff line
@@ -340,7 +340,7 @@ void __init_or_cpufreq s5p6442_setup_clocks(void) 
	clk_pclkd1.rate = pclkd1;

}



static struct clk init_clocks_disable[] = {

static struct clk init_clocks_off[] = {

	{

		.name		= "pdma",

		.id		= -1,
@@ -408,23 +408,13 @@ static struct clk *clks[] __initdata = { 


void __init s5p6442_register_clocks(void)

{

	struct clk *clkptr;

	int i, ret;



	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));



	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));

	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));



	clkptr = init_clocks_disable;

	for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) {

		ret = s3c24xx_register_clock(clkptr);

		if (ret < 0) {

			printk(KERN_ERR "Fail to register clock %s (%d)\n",

					clkptr->name, ret);

		} else

			(clkptr->enable)(clkptr, 0);

	}

	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));

	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));



	s3c_pwmclk_init();

}

arch/arm/mach-s5p64x0/clock-s5p6440.c

+3 −13
Original line number Diff line number Diff line
@@ -133,7 +133,7 @@ static struct clksrc_clk clk_pclk_low = { 
 * recommended to keep the following clocks disabled until the driver requests

 * for enabling the clock.

 */

static struct clk init_clocks_disable[] = {

static struct clk init_clocks_off[] = {

	{

		.name		= "nand",

		.id		= -1,
@@ -602,8 +602,6 @@ static struct clk *clks[] __initdata = { 


void __init s5p6440_register_clocks(void)

{

	struct clk *clkp;

	int ret;

	int ptr;



	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
@@ -614,16 +612,8 @@ void __init s5p6440_register_clocks(void) 
	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));

	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));



	clkp = init_clocks_disable;

	for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {



		ret = s3c24xx_register_clock(clkp);

		if (ret < 0) {

			printk(KERN_ERR "Failed to register clock %s (%d)\n",

			       clkp->name, ret);

		}

		(clkp->enable)(clkp, 0);

	}

	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));

	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));



	s3c_pwmclk_init();

}

arch/arm/mach-s5p64x0/clock-s5p6450.c

+3 −13
Original line number Diff line number Diff line
@@ -181,7 +181,7 @@ static struct clksrc_clk clk_pclk_low = { 
 * recommended to keep the following clocks disabled until the driver requests

 * for enabling the clock.

 */

static struct clk init_clocks_disable[] = {

static struct clk init_clocks_off[] = {

	{

		.name		= "usbhost",

		.id		= -1,
@@ -651,8 +651,6 @@ void __init_or_cpufreq s5p6450_setup_clocks(void) 


void __init s5p6450_register_clocks(void)

{

	struct clk *clkp;

	int ret;

	int ptr;



	for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
@@ -661,16 +659,8 @@ void __init s5p6450_register_clocks(void) 
	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));

	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));



	clkp = init_clocks_disable;

	for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {



		ret = s3c24xx_register_clock(clkp);

		if (ret < 0) {

			printk(KERN_ERR "Failed to register clock %s (%d)\n",

			       clkp->name, ret);

		}

		(clkp->enable)(clkp, 0);

	}

	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));

	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));



	s3c_pwmclk_init();

}

arch/arm/mach-s5pc100/clock.c

+3 −13
Original line number Diff line number Diff line
@@ -396,7 +396,7 @@ static int s5pc100_sclk1_ctrl(struct clk *clk, int enable) 
 * recommended to keep the following clocks disabled until the driver requests

 * for enabling the clock.

 */

static struct clk init_clocks_disable[] = {

static struct clk init_clocks_off[] = {

	{

		.name		= "cssys",

		.id		= -1,
@@ -1381,8 +1381,6 @@ static struct clk *clks[] __initdata = { 


void __init s5pc100_register_clocks(void)

{

	struct clk *clkp;

	int ret;

	int ptr;



	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
@@ -1393,16 +1391,8 @@ void __init s5pc100_register_clocks(void) 
	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));

	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));



	clkp = init_clocks_disable;

	for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {



		ret = s3c24xx_register_clock(clkp);

		if (ret < 0) {

			printk(KERN_ERR "Failed to register clock %s (%d)\n",

			       clkp->name, ret);

		}

		(clkp->enable)(clkp, 0);

	}

	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));

	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));



	s3c_pwmclk_init();

}