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Commit aa3a816b authored by Guillaume Thouvenin's avatar Guillaume Thouvenin Committed by Avi Kivity
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KVM: x86 emulator: Use DstAcc for 'and' 



For instruction 'and al,imm' we use DstAcc instead of doing
the emulation directly into the instruction's opcode.

Signed-off-by: default avatarGuillaume Thouvenin <guillaume.thouvenin@ext.bull.net>
Signed-off-by: default avatarAvi Kivity <avi@qumranet.com>
parent 8a9fee67

arch/x86/kvm/x86_emulate.c

+2 −19
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@ static u16 opcode_table[256] = { 
	/* 0x20 - 0x27 */

	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,

	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,

	SrcImmByte, SrcImm, 0, 0,

	DstAcc | SrcImmByte, DstAcc | SrcImm, 0, 0,

	/* 0x28 - 0x2F */

	ByteOp | DstMem | SrcReg | ModRM, DstMem | SrcReg | ModRM,

	ByteOp | DstReg | SrcMem | ModRM, DstReg | SrcMem | ModRM,
@@ -1392,27 +1392,10 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops) 
	      sbb:		/* sbb */

		emulate_2op_SrcV("sbb", c->src, c->dst, ctxt->eflags);

		break;

	case 0x20 ... 0x23:

	case 0x20 ... 0x25:

	      and:		/* and */

		emulate_2op_SrcV("and", c->src, c->dst, ctxt->eflags);

		break;

	case 0x24:              /* and al imm8 */

		c->dst.type = OP_REG;

		c->dst.ptr = &c->regs[VCPU_REGS_RAX];

		c->dst.val = *(u8 *)c->dst.ptr;

		c->dst.bytes = 1;

		c->dst.orig_val = c->dst.val;

		goto and;

	case 0x25:              /* and ax imm16, or eax imm32 */

		c->dst.type = OP_REG;

		c->dst.bytes = c->op_bytes;

		c->dst.ptr = &c->regs[VCPU_REGS_RAX];

		if (c->op_bytes == 2)

			c->dst.val = *(u16 *)c->dst.ptr;

		else

			c->dst.val = *(u32 *)c->dst.ptr;

		c->dst.orig_val = c->dst.val;

		goto and;

	case 0x28 ... 0x2d:

	      sub:		/* sub */

		emulate_2op_SrcV("sub", c->src, c->dst, ctxt->eflags);