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Commit a8ae5afa authored by Tero Kristo's avatar Tero Kristo Committed by Tony Lindgren
Browse files

ARM: OMAP4+/AM33xx: CM: add common API for cm_wait_module_idle 



Adds a generic CM driver API for waiting module to enter idle / standby.
The SoC specific implementations are registered through cm_ll_data.

Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
Acked-by: default avatarPaul Walmsley <paul@pwsan.com>
Tested-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 021b6ff0

arch/arm/mach-omap2/cm.h

+5 −0
Original line number Diff line number Diff line
@@ -45,18 +45,23 @@ extern void omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2); 
 * struct cm_ll_data - fn ptrs to per-SoC CM function implementations

 * @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl

 * @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl

 * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl

 */

struct cm_ll_data {

	int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,

				u8 *idlest_reg_id);

	int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,

				 u8 idlest_shift);

	int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,

				u8 idlest_shift);

};



extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,

			       u8 *idlest_reg_id);

int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,

			      u8 idlest_shift);

int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,

			     u8 idlest_shift);

extern int cm_register(struct cm_ll_data *cld);

extern int cm_unregister(struct cm_ll_data *cld);

arch/arm/mach-omap2/cm33xx.c

+5 −1
Original line number Diff line number Diff line
@@ -250,14 +250,17 @@ static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs, 
/**

 * am33xx_cm_wait_module_idle - wait for a module to be in 'disabled'

 * state

 * @part: CM partition, ignored for AM33xx

 * @inst: CM instance register offset (*_INST macro)

 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)

 * @bit_shift: bit shift for the register, ignored for AM33xx

 *

 * Wait for the module IDLEST to be disabled. Some PRCM transition,

 * like reset assertion or parent clock de-activation must wait the

 * module to be fully disabled.

 */

int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)

static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,

				      u8 bit_shift)

{

	int i = 0;
@@ -364,6 +367,7 @@ struct clkdm_ops am33xx_clkdm_operations = { 


static struct cm_ll_data am33xx_cm_ll_data = {

	.wait_module_ready	= &am33xx_cm_wait_module_ready,

	.wait_module_idle	= &am33xx_cm_wait_module_idle,

};



int __init am33xx_cm_init(void)

arch/arm/mach-omap2/cm33xx.h

+0 −5
Original line number Diff line number Diff line
@@ -382,16 +382,11 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs); 
int am33xx_cm_init(void);



#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)

int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs);

extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,

					u16 clkctrl_offs);

extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,

					u16 clkctrl_offs);

#else

static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)

{

	return 0;

}

static inline void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,

					u16 clkctrl_offs)

{

arch/arm/mach-omap2/cm_common.c

+26 −0
Original line number Diff line number Diff line
@@ -97,6 +97,32 @@ int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg, 
					     idlest_shift);

}



/**

 * omap_cm_wait_module_idle - wait for a module to enter idle or standby

 * @part: PRCM partition

 * @prcm_mod: PRCM module offset

 * @idlest_reg: CM_IDLESTx register

 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check

 *

 * Wait for the PRCM to indicate that the module identified by

 * (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked.  Return

 * 0 upon success, -EBUSY if the module doesn't enable in time, or

 * -EINVAL if no per-SoC wait_module_idle() function pointer has been

 * registered or if the idlest register is unknown on the SoC.

 */

int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,

			     u8 idlest_shift)

{

	if (!cm_ll_data->wait_module_idle) {

		WARN_ONCE(1, "cm: %s: no low-level function defined\n",

			  __func__);

		return -EINVAL;

	}



	return cm_ll_data->wait_module_idle(part, prcm_mod, idlest_reg,

					    idlest_shift);

}



/**

 * cm_register - register per-SoC low-level data with the CM

 * @cld: low-level per-SoC OMAP CM data & function pointers to register

arch/arm/mach-omap2/cminst44xx.c

+4 −1
Original line number Diff line number Diff line
@@ -293,12 +293,14 @@ static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs, 
 * @part: PRCM partition ID that the CM_CLKCTRL register exists in

 * @inst: CM instance register offset (*_INST macro)

 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)

 * @bit_shift: Bit shift for the register, ignored for OMAP4+

 *

 * Wait for the module IDLEST to be disabled. Some PRCM transition,

 * like reset assertion or parent clock de-activation must wait the

 * module to be fully disabled.

 */

int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs)

static int omap4_cminst_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,

					 u8 bit_shift)

{

	int i = 0;
@@ -510,6 +512,7 @@ struct clkdm_ops am43xx_clkdm_operations = { 


static struct cm_ll_data omap4xxx_cm_ll_data = {

	.wait_module_ready	= &omap4_cminst_wait_module_ready,

	.wait_module_idle	= &omap4_cminst_wait_module_idle,

};



int __init omap4_cm_init(void)