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Commit a87bb52d authored by Ravikishore Pampana's avatar Ravikishore Pampana
Browse files

msm: camera: isp: Dual tfe event check with proper hw idx 



Dual tfe events such as sof, eof and epoch need to come for
both master and slave hardware. Master and slave can be with
any hw index. Daul tfe hardware events need to check with acquired master
and slave index.
Remove the bus stride alignment check, it is not required for tfe.
For some bus port format alignment can be 3 or 5.
CSID immediate stop need to configure for csid slave also as immediate stop
Command does not take it from master csid.

CRs-Fixed: 2585713
Change-Id: I32d7c62843f22ab6d2185795f0959c202a49f295
Signed-off-by: default avatarRavikishore Pampana <rpampana@codeaurora.org>
parent ae401df5

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

+3 −0
Original line number Diff line number Diff line
@@ -3729,6 +3729,9 @@ static int cam_ife_mgr_reset_vfe_hw(struct cam_ife_hw_mgr *hw_mgr, 
	vfe_reset_type = CAM_VFE_HW_RESET_HW;



	for (i = 0; i < CAM_VFE_HW_NUM_MAX; i++) {

		if (!hw_mgr->ife_devices[i])

			continue;



		if (hw_idx != hw_mgr->ife_devices[i]->hw_idx)

			continue;

		CAM_DBG(CAM_ISP, "VFE (id = %d) reset", hw_idx);

drivers/cam_isp/isp_hw_mgr/cam_tfe_hw_mgr.c

+25 −18
Original line number Diff line number Diff line
@@ -1328,6 +1328,8 @@ static int cam_tfe_hw_mgr_acquire_res_tfe_csid_pxl( 
			goto end;

		}

		csid_res_temp->hw_res[1] = csid_acquire.node_res;

		tfe_ctx->slave_hw_idx =

			csid_res_temp->hw_res[1]->hw_intf->hw_idx;

		CAM_DBG(CAM_ISP, "CSID right acquired success is_dual %d",

			in_port->usage_type);

	}
@@ -2679,6 +2681,9 @@ static int cam_tfe_mgr_reset_tfe_hw(struct cam_tfe_hw_mgr *hw_mgr, 
	tfe_reset_type = CAM_TFE_HW_RESET_HW;



	for (i = 0; i < CAM_TFE_HW_NUM_MAX; i++) {

		if (!hw_mgr->tfe_devices[i])

			continue;



		if (hw_idx != hw_mgr->tfe_devices[i]->hw_idx)

			continue;

		CAM_DBG(CAM_ISP, "TFE (id = %d) reset", hw_idx);
@@ -4665,12 +4670,15 @@ static int cam_tfe_hw_mgr_check_irq_for_dual_tfe( 
{

	int32_t                               rc = -EINVAL;

	uint32_t                             *event_cnt = NULL;

	uint32_t                              core_idx0 = 0;

	uint32_t                              core_idx1 = 1;

	uint32_t                              master_hw_idx;

	uint32_t                              slave_hw_idx;



	if (!tfe_hw_mgr_ctx->is_dual)

		return 0;



	master_hw_idx = tfe_hw_mgr_ctx->master_hw_idx;

	slave_hw_idx = tfe_hw_mgr_ctx->slave_hw_idx;



	switch (hw_event_type) {

	case CAM_ISP_HW_EVENT_SOF:

		event_cnt = tfe_hw_mgr_ctx->sof_cnt;
@@ -4685,19 +4693,18 @@ static int cam_tfe_hw_mgr_check_irq_for_dual_tfe( 
		return 0;

	}



	if (event_cnt[core_idx0] == event_cnt[core_idx1]) {

	if (event_cnt[master_hw_idx] == event_cnt[slave_hw_idx]) {



		event_cnt[core_idx0] = 0;

		event_cnt[core_idx1] = 0;

		event_cnt[master_hw_idx] = 0;

		event_cnt[slave_hw_idx] = 0;



		rc = 0;

		return rc;

		return 0;

	}



	if ((event_cnt[core_idx0] &&

		(event_cnt[core_idx0] - event_cnt[core_idx1] > 1)) ||

		(event_cnt[core_idx1] &&

		(event_cnt[core_idx1] - event_cnt[core_idx0] > 1))) {

	if ((event_cnt[master_hw_idx] &&

		(event_cnt[master_hw_idx] - event_cnt[slave_hw_idx] > 1)) ||

		(event_cnt[slave_hw_idx] &&

		(event_cnt[slave_hw_idx] - event_cnt[master_hw_idx] > 1))) {



		if (tfe_hw_mgr_ctx->dual_tfe_irq_mismatch_cnt > 10) {

			rc = -1;
@@ -4705,15 +4712,15 @@ static int cam_tfe_hw_mgr_check_irq_for_dual_tfe( 
		}



		CAM_ERR_RATE_LIMIT(CAM_ISP,

			"One TFE could not generate hw event %d id0:%d id1:%d",

			hw_event_type, event_cnt[core_idx0],

			event_cnt[core_idx1]);

		if (event_cnt[core_idx0] >= 2) {

			event_cnt[core_idx0]--;

			"One TFE could not generate hw event %d master id :%d slave id:%d",

			hw_event_type, event_cnt[master_hw_idx],

			event_cnt[slave_hw_idx]);

		if (event_cnt[master_hw_idx] >= 2) {

			event_cnt[master_hw_idx]--;

			tfe_hw_mgr_ctx->dual_tfe_irq_mismatch_cnt++;

		}

		if (event_cnt[core_idx1] >= 2) {

			event_cnt[core_idx1]--;

		if (event_cnt[slave_hw_idx] >= 2) {

			event_cnt[slave_hw_idx]--;

			tfe_hw_mgr_ctx->dual_tfe_irq_mismatch_cnt++;

		}

drivers/cam_isp/isp_hw_mgr/cam_tfe_hw_mgr.h

+2 −0
Original line number Diff line number Diff line
@@ -79,6 +79,7 @@ struct cam_tfe_hw_mgr_debug { 
 * @is_dual                   indicate whether context is in dual TFE mode

 * @is_tpg                    indicate whether context use tpg

 * @master_hw_idx             master hardware index in dual tfe case

 * @slave_hw_idx              slave hardware index in dual tfe case

 * @dual_tfe_irq_mismatch_cnt irq mismatch count value per core, used for

 *                              dual TFE

 */
@@ -122,6 +123,7 @@ struct cam_tfe_hw_mgr_ctx { 
	bool                            is_dual;

	bool                            is_tpg;

	uint32_t                        master_hw_idx;

	uint32_t                        slave_hw_idx;

	uint32_t                        dual_tfe_irq_mismatch_cnt;

};

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_csid_hw/cam_tfe_csid_core.c

+12 −0
Original line number Diff line number Diff line
@@ -1275,6 +1275,18 @@ static int cam_tfe_csid_disable_pxl_path( 
			pxl_reg->csid_pxl_ctrl_addr);

	}



	if (path_data->sync_mode == CAM_ISP_HW_SYNC_SLAVE &&

		stop_cmd == CAM_TFE_CSID_HALT_IMMEDIATELY) {

		/* configure Halt for slave */

		val = cam_io_r_mb(soc_info->reg_map[0].mem_base +

			pxl_reg->csid_pxl_ctrl_addr);

		val &= ~0xF;

		val |= stop_cmd;

		val |= (TFE_CSID_HALT_MODE_MASTER << 2);

		cam_io_w_mb(val, soc_info->reg_map[0].mem_base +

			pxl_reg->csid_pxl_ctrl_addr);

	}



	return rc;

}

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_bus.c

+0 −8
Original line number Diff line number Diff line
@@ -1657,14 +1657,6 @@ static int cam_tfe_bus_update_wm(void *priv, void *cmd_args, 
		CAM_DBG(CAM_ISP, "WM:%d image height and width 0x%x",

			wm_data->index, reg_val_pair[j-1]);



		val = io_cfg->planes[i].plane_stride;

		CAM_DBG(CAM_ISP, "before stride 0x%x", val);

		val = ALIGNUP(val, 16);

		if (val != io_cfg->planes[i].plane_stride &&

			val != wm_data->stride)

			CAM_WARN(CAM_ISP, "Warning stride %u expected %u",

				io_cfg->planes[i].plane_stride, val);



		val = wm_data->offset;

		CAM_TFE_ADD_REG_VAL_PAIR(reg_val_pair, j,

			wm_data->hw_regs->image_cfg_1, val);