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Commit a8338772 authored by Manivannan Sadhasivam's avatar Manivannan Sadhasivam Committed by Stephen Boyd
Browse files

clk: actions: Add mux clock support 



Add support for Actions Semi mux clock together with helper
functions to be used in composite clock.

Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 103c5e1b

drivers/clk/actions/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -2,3 +2,4 @@ obj-$(CONFIG_CLK_ACTIONS) += clk-owl.o 


clk-owl-y			+= owl-common.o

clk-owl-y			+= owl-gate.o

clk-owl-y			+= owl-mux.o

drivers/clk/actions/owl-mux.c

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// SPDX-License-Identifier: GPL-2.0+

//

// OWL mux clock driver

//

// Copyright (c) 2014 Actions Semi Inc.

// Author: David Liu <liuwei@actions-semi.com>

//

// Copyright (c) 2018 Linaro Ltd.

// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>



#include <linux/clk-provider.h>

#include <linux/regmap.h>



#include "owl-mux.h"



u8 owl_mux_helper_get_parent(const struct owl_clk_common *common,

			     const struct owl_mux_hw *mux_hw)

{

	u32 reg;

	u8 parent;



	regmap_read(common->regmap, mux_hw->reg, &reg);

	parent = reg >> mux_hw->shift;

	parent &= BIT(mux_hw->width) - 1;



	return parent;

}



static u8 owl_mux_get_parent(struct clk_hw *hw)

{

	struct owl_mux *mux = hw_to_owl_mux(hw);



	return owl_mux_helper_get_parent(&mux->common, &mux->mux_hw);

}



int owl_mux_helper_set_parent(const struct owl_clk_common *common,

			      struct owl_mux_hw *mux_hw, u8 index)

{

	u32 reg;



	regmap_read(common->regmap, mux_hw->reg, &reg);

	reg &= ~GENMASK(mux_hw->width + mux_hw->shift - 1, mux_hw->shift);

	regmap_write(common->regmap, mux_hw->reg,

			reg | (index << mux_hw->shift));



	return 0;

}



static int owl_mux_set_parent(struct clk_hw *hw, u8 index)

{

	struct owl_mux *mux = hw_to_owl_mux(hw);



	return owl_mux_helper_set_parent(&mux->common, &mux->mux_hw, index);

}



const struct clk_ops owl_mux_ops = {

	.get_parent = owl_mux_get_parent,

	.set_parent = owl_mux_set_parent,

	.determine_rate = __clk_mux_determine_rate,

};

drivers/clk/actions/owl-mux.h

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// SPDX-License-Identifier: GPL-2.0+

//

// OWL mux clock driver

//

// Copyright (c) 2014 Actions Semi Inc.

// Author: David Liu <liuwei@actions-semi.com>

//

// Copyright (c) 2018 Linaro Ltd.

// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>



#ifndef _OWL_MUX_H_

#define _OWL_MUX_H_



#include "owl-common.h"



struct owl_mux_hw {

	u32			reg;

	u8			shift;

	u8			width;

};



struct owl_mux {

	struct owl_mux_hw	mux_hw;

	struct owl_clk_common	common;

};



#define OWL_MUX_HW(_reg, _shift, _width)		\

	{						\

		.reg	= _reg,				\

		.shift	= _shift,			\

		.width	= _width,			\

	}



#define OWL_MUX(_struct, _name, _parents, _reg,				\

		_shift, _width, _flags)					\

	struct owl_mux _struct = {					\

		.mux_hw	= OWL_MUX_HW(_reg, _shift, _width),		\

		.common = {						\

			.regmap = NULL,					\

			.hw.init = CLK_HW_INIT_PARENTS(_name,		\

						       _parents,	\

						       &owl_mux_ops,	\

						       _flags),		\

		},							\

	}



static inline struct owl_mux *hw_to_owl_mux(const struct clk_hw *hw)

{

	struct owl_clk_common *common = hw_to_owl_clk_common(hw);



	return container_of(common, struct owl_mux, common);

}



u8 owl_mux_helper_get_parent(const struct owl_clk_common *common,

			     const struct owl_mux_hw *mux_hw);

int owl_mux_helper_set_parent(const struct owl_clk_common *common,

			      struct owl_mux_hw *mux_hw, u8 index);



extern const struct clk_ops owl_mux_ops;



#endif /* _OWL_MUX_H_ */