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Commit a7cbf0b2 authored by Gregory CLEMENT's avatar Gregory CLEMENT
Browse files

ARM64: dts: marvell: armada-cp110: Add registers clock for SPI nodes 



This extra clock is needed to access the registers of the SPI controller
used on Armada 7K/8K SoCs.

This follows the changes already made in the binding documentation (as
well as in the driver) in:
'commit 92ae112e ("spi: orion: Fix clock
resource by adding an optional bus clock")'.

Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
parent 7928b2cb

arch/arm64/boot/dts/marvell/armada-cp110.dtsi

+6 −2
Original line number Diff line number Diff line
@@ -257,7 +257,9 @@ 
			reg = <0x700600 0x50>;

			#address-cells = <0x1>;

			#size-cells = <0x0>;

			clocks = <&CP110_LABEL(clk) 1 21>;

			clock-names = "core", "axi";

			clocks = <&CP110_LABEL(clk) 1 21>,

				 <&CP110_LABEL(clk) 1 17>;

			status = "disabled";

		};
@@ -266,7 +268,9 @@ 
			reg = <0x700680 0x50>;

			#address-cells = <1>;

			#size-cells = <0>;

			clocks = <&CP110_LABEL(clk) 1 21>;

			clock-names = "core", "axi";

			clocks = <&CP110_LABEL(clk) 1 21>,

				 <&CP110_LABEL(clk) 1 17>;

			status = "disabled";

		};