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Commit a7990ba6 authored by Mallikarjuna R Chilakala's avatar Mallikarjuna R Chilakala Committed by Jeff Garzik
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e1000: Flush shadow RAM



Flush shadow RAM to save updates to ASF related bits for 82573 controllers.
These bits are past the first 63 words of NVM.

Signed-off-by: default avatarMallikarjuna R Chilakala <mallikarjuna.chilakala@intel.com>
Signed-off-by: default avatarGanesh Venkatesan <ganesh.venkatesan@intel.com>
Signed-off-by: default avatarJohn Ronciak <john.ronciak@intel.com>
Signed-off-by: default avatarJeff Garzik <jgarzik@pobox.com>
parent 352c9f85
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+4 −2
Original line number Original line Diff line number Diff line
@@ -547,8 +547,10 @@ e1000_set_eeprom(struct net_device *netdev,
	ret_val = e1000_write_eeprom(hw, first_word,
	ret_val = e1000_write_eeprom(hw, first_word,
				     last_word - first_word + 1, eeprom_buff);
				     last_word - first_word + 1, eeprom_buff);


	/* Update the checksum over the first part of the EEPROM if needed */
	/* Update the checksum over the first part of the EEPROM if needed 
	if((ret_val == 0) && first_word <= EEPROM_CHECKSUM_REG)
	 * and flush shadow RAM for 82573 conrollers */
	if((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) || 
				(hw->mac_type == e1000_82573)))
		e1000_update_eeprom_checksum(hw);
		e1000_update_eeprom_checksum(hw);


	kfree(eeprom_buff);
	kfree(eeprom_buff);
+1 −0
Original line number Original line Diff line number Diff line
@@ -717,6 +717,7 @@ e1000_init_hw(struct e1000_hw *hw)
    default:
    default:
        break;
        break;
    case e1000_82571:
    case e1000_82571:
    case e1000_82572:
        ctrl = E1000_READ_REG(hw, TXDCTL1);
        ctrl = E1000_READ_REG(hw, TXDCTL1);
        ctrl &= ~E1000_TXDCTL_WTHRESH;
        ctrl &= ~E1000_TXDCTL_WTHRESH;
        ctrl |= E1000_TXDCTL_COUNT_DESC | E1000_TXDCTL_FULL_TX_DESC_WB;
        ctrl |= E1000_TXDCTL_COUNT_DESC | E1000_TXDCTL_FULL_TX_DESC_WB;