Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a6461134 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Ulf Hansson
Browse files

mmc: sunxi: Fix NULL pointer reference on clk_delays



Some SoCs do not support clk delays for MMC in the clock control unit.
These include the old controllers in A10/A10s/A13/R8, and the new eMMC
controller in A64. The config structure for these controllers do not
specify clk_delays, but the check for this was replaced in change
"mmc: sunxi: Support controllers that can use both old and new timings".

This patch adds back the check for clk_delays, and also adds comments
for both checks in sunxi_mmc_clk_set_phase().

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Tested-by: default avatarIcenowy Zheng <icenowy@aosc.io>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent ac98caef
Loading
Loading
Loading
Loading
+5 −0
Original line number Diff line number Diff line
@@ -722,9 +722,14 @@ static int sunxi_mmc_clk_set_phase(struct sunxi_mmc_host *host,
{
	int index;

	/* clk controller delays not used under new timings mode */
	if (host->use_new_timings)
		return 0;

	/* some old controllers don't support delays */
	if (!host->cfg->clk_delays)
		return 0;

	/* determine delays */
	if (rate <= 400000) {
		index = SDXC_CLK_400K;