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Commit a6450cb0 authored by Mika Westerberg's avatar Mika Westerberg Committed by Lee Jones
Browse files

mfd: lpc_ich: Add support for Intel Gemini Lake SoC 



Like Intel Apollo Lake, Gemini Lake exposes the serial SPI flash device BAR
through hidden P2SB PCI device. We use the same mechanism than Apollo Lake
to read the BAR and pass it to the driver.

Signed-off-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
parent ac03fec1

drivers/mfd/lpc_ich.c

+6 −0
Original line number Diff line number Diff line
@@ -227,6 +227,7 @@ enum lpc_chipsets { 
	LPC_LEWISBURG,	/* Lewisburg */

	LPC_9S,		/* 9 Series */

	LPC_APL,	/* Apollo Lake SoC */

	LPC_GLK,	/* Gemini Lake SoC */

	LPC_COUGARMOUNTAIN,/* Cougar Mountain SoC*/

};
@@ -555,6 +556,10 @@ static struct lpc_ich_info lpc_chipset_info[] = { 
		.iTCO_version = 5,

		.spi_type = INTEL_SPI_BXT,

	},

	[LPC_GLK] = {

		.name = "Gemini Lake SoC",

		.spi_type = INTEL_SPI_BXT,

	},

	[LPC_COUGARMOUNTAIN] = {

		.name = "Cougar Mountain SoC",

		.iTCO_version = 3,
@@ -687,6 +692,7 @@ static const struct pci_device_id lpc_ich_ids[] = { 
	{ PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME},

	{ PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9},

	{ PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M},

	{ PCI_VDEVICE(INTEL, 0x3197), LPC_GLK},

	{ PCI_VDEVICE(INTEL, 0x2b9c), LPC_COUGARMOUNTAIN},

	{ PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO},

	{ PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R},