VINO driver version 0.0.5. (a637a114) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/media/video/indycam.c

+163 −99

Original line number	Diff line number	Diff line
		@@ -27,15 +27,15 @@

		#include "indycam.h"

		//#define INDYCAM_DEBUG

		#define INDYCAM_MODULE_VERSION "0.0.3"
		#define INDYCAM_MODULE_VERSION "0.0.5"

		MODULE_DESCRIPTION("SGI IndyCam driver");
		MODULE_VERSION(INDYCAM_MODULE_VERSION);
		MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
		MODULE_LICENSE("GPL");

		// #define INDYCAM_DEBUG

		#ifdef INDYCAM_DEBUG
		#define dprintk(x...) printk("IndyCam: " x);
		#define indycam_regdump(client) indycam_regdump_debug(client)
		@@ -46,14 +46,14 @@ MODULE_LICENSE("GPL");

		struct indycam {
		struct i2c_client *client;
		int version;
		u8 version;
		};

		static struct i2c_driver i2c_driver_indycam;

		static const unsigned char initseq[] = {
		static const u8 initseq[] = {
		INDYCAM_CONTROL_AGCENA, /* INDYCAM_CONTROL */
		INDYCAM_SHUTTER_DEFAULT, /* INDYCAM_SHUTTER */
		INDYCAM_SHUTTER_60, /* INDYCAM_SHUTTER */
		INDYCAM_GAIN_DEFAULT, /* INDYCAM_GAIN */
		0x00, /* INDYCAM_BRIGHTNESS (read-only) */
		INDYCAM_RED_BALANCE_DEFAULT, /* INDYCAM_RED_BALANCE */
		@@ -64,12 +64,11 @@ static const unsigned char initseq[] = {

		/* IndyCam register handling */

		static int indycam_read_reg(struct i2c_client *client, unsigned char reg,
		unsigned char *value)
		static int indycam_read_reg(struct i2c_client client, u8 reg, u8 value)
		{
		int ret;

		if (reg == INDYCAM_RESET) {
		if (reg == INDYCAM_REG_RESET) {
		dprintk("indycam_read_reg(): "
		"skipping write-only register %d\n", reg);
		*value = 0;
		@@ -77,24 +76,24 @@ static int indycam_read_reg(struct i2c_client *client, unsigned char reg,
		}

		ret = i2c_smbus_read_byte_data(client, reg);

		if (ret < 0) {
		printk(KERN_ERR "IndyCam: indycam_read_reg(): read failed, "
		"register = 0x%02x\n", reg);
		return ret;
		}

		*value = (unsigned char)ret;
		*value = (u8)ret;

		return 0;
		}

		static int indycam_write_reg(struct i2c_client *client, unsigned char reg,
		unsigned char value)
		static int indycam_write_reg(struct i2c_client *client, u8 reg, u8 value)
		{
		int err;

		if ((reg == INDYCAM_BRIGHTNESS)
		\|\| (reg == INDYCAM_VERSION)) {
		if ((reg == INDYCAM_REG_BRIGHTNESS)
		\|\| (reg == INDYCAM_REG_VERSION)) {
		dprintk("indycam_write_reg(): "
		"skipping read-only register %d\n", reg);
		return 0;
		@@ -102,6 +101,7 @@ static int indycam_write_reg(struct i2c_client *client, unsigned char reg,

		dprintk("Writing Reg %d = 0x%02x\n", reg, value);
		err = i2c_smbus_write_byte_data(client, reg, value);

		if (err) {
		printk(KERN_ERR "IndyCam: indycam_write_reg(): write failed, "
		"register = 0x%02x, value = 0x%02x\n", reg, value);
		@@ -109,13 +109,12 @@ static int indycam_write_reg(struct i2c_client *client, unsigned char reg,
		return err;
		}

		static int indycam_write_block(struct i2c_client *client, unsigned char reg,
		unsigned char length, unsigned char *data)
		static int indycam_write_block(struct i2c_client *client, u8 reg,
		u8 length, u8 *data)
		{
		unsigned char i;
		int err;
		int i, err;

		for (i = reg; i < length; i++) {
		for (i = 0; i < length; i++) {
		err = indycam_write_reg(client, reg + i, data[i]);
		if (err)
		return err;
		@@ -130,7 +129,7 @@ static int indycam_write_block(struct i2c_client *client, unsigned char reg,
		static void indycam_regdump_debug(struct i2c_client *client)
		{
		int i;
		unsigned char val;
		u8 val;

		for (i = 0; i < 9; i++) {
		indycam_read_reg(client, i, &val);
		@@ -139,76 +138,144 @@ static void indycam_regdump_debug(struct i2c_client *client)
		}
		#endif

		static int indycam_get_controls(struct i2c_client *client,
		static int indycam_get_control(struct i2c_client *client,
		struct indycam_control *ctrl)
		{
		unsigned char ctrl_reg;

		indycam_read_reg(client, INDYCAM_CONTROL, &ctrl_reg);
		ctrl->agc = (ctrl_reg & INDYCAM_CONTROL_AGCENA)
		? INDYCAM_VALUE_ENABLED
		: INDYCAM_VALUE_DISABLED;
		ctrl->awb = (ctrl_reg & INDYCAM_CONTROL_AWBCTL)
		? INDYCAM_VALUE_ENABLED
		: INDYCAM_VALUE_DISABLED;
		indycam_read_reg(client, INDYCAM_SHUTTER,
		(unsigned char *)&ctrl->shutter);
		indycam_read_reg(client, INDYCAM_GAIN,
		(unsigned char *)&ctrl->gain);
		indycam_read_reg(client, INDYCAM_RED_BALANCE,
		(unsigned char *)&ctrl->red_balance);
		indycam_read_reg(client, INDYCAM_BLUE_BALANCE,
		(unsigned char *)&ctrl->blue_balance);
		indycam_read_reg(client, INDYCAM_RED_SATURATION,
		(unsigned char *)&ctrl->red_saturation);
		indycam_read_reg(client, INDYCAM_BLUE_SATURATION,
		(unsigned char *)&ctrl->blue_saturation);
		indycam_read_reg(client, INDYCAM_GAMMA,
		(unsigned char *)&ctrl->gamma);
		struct indycam *camera = i2c_get_clientdata(client);
		u8 reg;
		int ret = 0;

		switch (ctrl->type) {
		case INDYCAM_CONTROL_AGC:
		case INDYCAM_CONTROL_AWB:
		ret = indycam_read_reg(client, INDYCAM_REG_CONTROL, &reg);
		if (ret)
		return -EIO;
		if (ctrl->type == INDYCAM_CONTROL_AGC)
		ctrl->value = (reg & INDYCAM_CONTROL_AGCENA)
		? 1 : 0;
		else
		ctrl->value = (reg & INDYCAM_CONTROL_AWBCTL)
		? 1 : 0;
		break;
		case INDYCAM_CONTROL_SHUTTER:
		ret = indycam_read_reg(client, INDYCAM_REG_SHUTTER, &reg);
		if (ret)
		return -EIO;
		ctrl->value = ((s32)reg == 0x00) ? 0xff : ((s32)reg - 1);
		break;
		case INDYCAM_CONTROL_GAIN:
		ret = indycam_read_reg(client, INDYCAM_REG_GAIN, &reg);
		if (ret)
		return -EIO;
		ctrl->value = (s32)reg;
		break;
		case INDYCAM_CONTROL_RED_BALANCE:
		ret = indycam_read_reg(client, INDYCAM_REG_RED_BALANCE, &reg);
		if (ret)
		return -EIO;
		ctrl->value = (s32)reg;
		break;
		case INDYCAM_CONTROL_BLUE_BALANCE:
		ret = indycam_read_reg(client, INDYCAM_REG_BLUE_BALANCE, &reg);
		if (ret)
		return -EIO;
		ctrl->value = (s32)reg;
		break;
		case INDYCAM_CONTROL_RED_SATURATION:
		ret = indycam_read_reg(client,
		INDYCAM_REG_RED_SATURATION, &reg);
		if (ret)
		return -EIO;
		ctrl->value = (s32)reg;
		break;
		case INDYCAM_CONTROL_BLUE_SATURATION:
		ret = indycam_read_reg(client,
		INDYCAM_REG_BLUE_SATURATION, &reg);
		if (ret)
		return -EIO;
		ctrl->value = (s32)reg;
		break;
		case INDYCAM_CONTROL_GAMMA:
		if (camera->version == CAMERA_VERSION_MOOSE) {
		ret = indycam_read_reg(client,
		INDYCAM_REG_GAMMA, &reg);
		if (ret)
		return -EIO;
		ctrl->value = (s32)reg;
		} else {
		ctrl->value = INDYCAM_GAMMA_DEFAULT;
		}
		break;
		default:
		ret = -EINVAL;
		}

		return 0;
		return ret;
		}

		static int indycam_set_controls(struct i2c_client *client,
		static int indycam_set_control(struct i2c_client *client,
		struct indycam_control *ctrl)
		{
		unsigned char ctrl_reg;
		struct indycam *camera = i2c_get_clientdata(client);
		u8 reg;
		int ret = 0;

		switch (ctrl->type) {
		case INDYCAM_CONTROL_AGC:
		case INDYCAM_CONTROL_AWB:
		ret = indycam_read_reg(client, INDYCAM_REG_CONTROL, &reg);
		if (ret)
		break;

		indycam_read_reg(client, INDYCAM_CONTROL, &ctrl_reg);
		if (ctrl->agc != INDYCAM_VALUE_UNCHANGED) {
		if (ctrl->agc)
		ctrl_reg \|= INDYCAM_CONTROL_AGCENA;
		if (ctrl->type == INDYCAM_CONTROL_AGC) {
		if (ctrl->value)
		reg \|= INDYCAM_CONTROL_AGCENA;
		else
		ctrl_reg &= ~INDYCAM_CONTROL_AGCENA;
		}
		if (ctrl->awb != INDYCAM_VALUE_UNCHANGED) {
		if (ctrl->awb)
		ctrl_reg \|= INDYCAM_CONTROL_AWBCTL;
		reg &= ~INDYCAM_CONTROL_AGCENA;
		} else {
		if (ctrl->value)
		reg \|= INDYCAM_CONTROL_AWBCTL;
		else
		ctrl_reg &= ~INDYCAM_CONTROL_AWBCTL;
		}
		indycam_write_reg(client, INDYCAM_CONTROL, ctrl_reg);

		if (ctrl->shutter >= 0)
		indycam_write_reg(client, INDYCAM_SHUTTER, ctrl->shutter);
		if (ctrl->gain >= 0)
		indycam_write_reg(client, INDYCAM_GAIN, ctrl->gain);
		if (ctrl->red_balance >= 0)
		indycam_write_reg(client, INDYCAM_RED_BALANCE,
		ctrl->red_balance);
		if (ctrl->blue_balance >= 0)
		indycam_write_reg(client, INDYCAM_BLUE_BALANCE,
		ctrl->blue_balance);
		if (ctrl->red_saturation >= 0)
		indycam_write_reg(client, INDYCAM_RED_SATURATION,
		ctrl->red_saturation);
		if (ctrl->blue_saturation >= 0)
		indycam_write_reg(client, INDYCAM_BLUE_SATURATION,
		ctrl->blue_saturation);
		if (ctrl->gamma >= 0)
		indycam_write_reg(client, INDYCAM_GAMMA, ctrl->gamma);
		reg &= ~INDYCAM_CONTROL_AWBCTL;
		}

		return 0;
		ret = indycam_write_reg(client, INDYCAM_REG_CONTROL, reg);
		break;
		case INDYCAM_CONTROL_SHUTTER:
		reg = (ctrl->value == 0xff) ? 0x00 : (ctrl->value + 1);
		ret = indycam_write_reg(client, INDYCAM_REG_SHUTTER, reg);
		break;
		case INDYCAM_CONTROL_GAIN:
		ret = indycam_write_reg(client, INDYCAM_REG_GAIN, ctrl->value);
		break;
		case INDYCAM_CONTROL_RED_BALANCE:
		ret = indycam_write_reg(client, INDYCAM_REG_RED_BALANCE,
		ctrl->value);
		break;
		case INDYCAM_CONTROL_BLUE_BALANCE:
		ret = indycam_write_reg(client, INDYCAM_REG_BLUE_BALANCE,
		ctrl->value);
		break;
		case INDYCAM_CONTROL_RED_SATURATION:
		ret = indycam_write_reg(client, INDYCAM_REG_RED_SATURATION,
		ctrl->value);
		break;
		case INDYCAM_CONTROL_BLUE_SATURATION:
		ret = indycam_write_reg(client, INDYCAM_REG_BLUE_SATURATION,
		ctrl->value);
		break;
		case INDYCAM_CONTROL_GAMMA:
		if (camera->version == CAMERA_VERSION_MOOSE) {
		ret = indycam_write_reg(client, INDYCAM_REG_GAMMA,
		ctrl->value);
		}
		break;
		default:
		ret = -EINVAL;
		}

		return ret;
		}

		/* I2C-interface */
		@@ -247,7 +314,8 @@ static int indycam_attach(struct i2c_adapter *adap, int addr, int kind)
		if (err)
		goto out_free_camera;

		camera->version = i2c_smbus_read_byte_data(client, INDYCAM_VERSION);
		camera->version = i2c_smbus_read_byte_data(client,
		INDYCAM_REG_VERSION);
		if (camera->version != CAMERA_VERSION_INDY &&
		camera->version != CAMERA_VERSION_MOOSE) {
		err = -ENODEV;
		@@ -260,8 +328,7 @@ static int indycam_attach(struct i2c_adapter *adap, int addr, int kind)
		indycam_regdump(client);

		// initialize
		err = indycam_write_block(client, 0, sizeof(initseq),
		(unsigned char *)&initseq);
		err = indycam_write_block(client, 0, sizeof(initseq), (u8 *)&initseq);
		if (err) {
		printk(KERN_ERR "IndyCam initalization failed\n");
		err = -EIO;
		@@ -271,11 +338,10 @@ static int indycam_attach(struct i2c_adapter *adap, int addr, int kind)
		indycam_regdump(client);

		// white balance
		err = indycam_write_reg(client, INDYCAM_CONTROL,
		err = indycam_write_reg(client, INDYCAM_REG_CONTROL,
		INDYCAM_CONTROL_AGCENA \| INDYCAM_CONTROL_AWBCTL);
		if (err) {
		printk(KERN_ERR "IndyCam white balance "
		"initialization failed\n");
		printk(KERN_ERR "IndyCam: White balancing camera failed\n");
		err = -EIO;
		goto out_detach_client;
		}
		@@ -371,13 +437,11 @@ static int indycam_command(struct i2c_client *client, unsigned int cmd,
		/* TODO: convert values for indycam_set_controls() */
		break;
		}
		case DECODER_INDYCAM_GET_CONTROLS: {
		struct indycam_control *ctrl = arg;
		indycam_get_controls(client, ctrl);
		case DECODER_INDYCAM_GET_CONTROL: {
		return indycam_get_control(client, arg);
		}
		case DECODER_INDYCAM_SET_CONTROLS: {
		struct indycam_control *ctrl = arg;
		indycam_set_controls(client, ctrl);
		case DECODER_INDYCAM_SET_CONTROL: {
		return indycam_set_control(client, arg);
		}
		default:
		return -EINVAL;

drivers/media/video/indycam.h

+42 −46

Original line number	Diff line number	Diff line
		@@ -22,21 +22,21 @@
		#define INDYCAM_VERSION_MINOR(x) ((x) & 0x0f)

		/* Register bus addresses */
		#define INDYCAM_CONTROL 0x00
		#define INDYCAM_SHUTTER 0x01
		#define INDYCAM_GAIN 0x02
		#define INDYCAM_BRIGHTNESS 0x03 /* read-only */
		#define INDYCAM_RED_BALANCE 0x04
		#define INDYCAM_BLUE_BALANCE 0x05
		#define INDYCAM_RED_SATURATION 0x06
		#define INDYCAM_BLUE_SATURATION 0x07
		#define INDYCAM_GAMMA 0x08
		#define INDYCAM_VERSION 0x0e /* read-only */
		#define INDYCAM_RESET 0x0f /* write-only */

		#define INDYCAM_LED 0x46
		#define INDYCAM_ORIENTATION 0x47
		#define INDYCAM_BUTTON 0x48
		#define INDYCAM_REG_CONTROL 0x00
		#define INDYCAM_REG_SHUTTER 0x01
		#define INDYCAM_REG_GAIN 0x02
		#define INDYCAM_REG_BRIGHTNESS 0x03 /* read-only */
		#define INDYCAM_REG_RED_BALANCE 0x04
		#define INDYCAM_REG_BLUE_BALANCE 0x05
		#define INDYCAM_REG_RED_SATURATION 0x06
		#define INDYCAM_REG_BLUE_SATURATION 0x07
		#define INDYCAM_REG_GAMMA 0x08
		#define INDYCAM_REG_VERSION 0x0e /* read-only */
		#define INDYCAM_REG_RESET 0x0f /* write-only */

		#define INDYCAM_REG_LED 0x46
		#define INDYCAM_REG_ORIENTATION 0x47
		#define INDYCAM_REG_BUTTON 0x48

		/* Field definitions of registers */
		#define INDYCAM_CONTROL_AGCENA (1<<0) /* automatic gain control */
		@@ -59,13 +59,14 @@
		#define INDYCAM_ORIENTATION_BOTTOM_TO_TOP 0x40
		#define INDYCAM_BUTTON_RELEASED 0x10

		/* Values for controls */
		#define INDYCAM_SHUTTER_MIN 0x00
		#define INDYCAM_SHUTTER_MAX 0xff
		#define INDYCAM_GAIN_MIN 0x00
		#define INDYCAM_GAIN_MAX 0xff
		#define INDYCAM_RED_BALANCE_MIN 0x00 /* the effect is the opposite? */
		#define INDYCAM_RED_BALANCE_MIN 0x00
		#define INDYCAM_RED_BALANCE_MAX 0xff
		#define INDYCAM_BLUE_BALANCE_MIN 0x00 /* the effect is the opposite? */
		#define INDYCAM_BLUE_BALANCE_MIN 0x00
		#define INDYCAM_BLUE_BALANCE_MAX 0xff
		#define INDYCAM_RED_SATURATION_MIN 0x00
		#define INDYCAM_RED_SATURATION_MAX 0xff
		@@ -74,34 +75,9 @@
		#define INDYCAM_GAMMA_MIN 0x00
		#define INDYCAM_GAMMA_MAX 0xff

		/* Driver interface definitions */

		#define INDYCAM_VALUE_ENABLED 1
		#define INDYCAM_VALUE_DISABLED 0
		#define INDYCAM_VALUE_UNCHANGED -1

		/* When setting controls, a value of -1 leaves the control unchanged. */
		struct indycam_control {
		int agc; /* boolean */
		int awb; /* boolean */
		int shutter;
		int gain;
		int red_balance;
		int blue_balance;
		int red_saturation;
		int blue_saturation;
		int gamma;
		};

		#define DECODER_INDYCAM_GET_CONTROLS _IOR('d', 193, struct indycam_control)
		#define DECODER_INDYCAM_SET_CONTROLS _IOW('d', 194, struct indycam_control)

		/* Default values for controls */

		#define INDYCAM_AGC_DEFAULT INDYCAM_VALUE_ENABLED
		#define INDYCAM_AWB_DEFAULT INDYCAM_VALUE_ENABLED

		#define INDYCAM_SHUTTER_DEFAULT INDYCAM_SHUTTER_60
		#define INDYCAM_AGC_DEFAULT 1
		#define INDYCAM_AWB_DEFAULT 0
		#define INDYCAM_SHUTTER_DEFAULT 0xff
		#define INDYCAM_GAIN_DEFAULT 0x80
		#define INDYCAM_RED_BALANCE_DEFAULT 0x18
		#define INDYCAM_BLUE_BALANCE_DEFAULT 0xa4
		@@ -109,4 +85,24 @@ struct indycam_control {
		#define INDYCAM_BLUE_SATURATION_DEFAULT 0xc0
		#define INDYCAM_GAMMA_DEFAULT 0x80

		/* Driver interface definitions */

		#define INDYCAM_CONTROL_AGC 0 /* boolean */
		#define INDYCAM_CONTROL_AWB 1 /* boolean */
		#define INDYCAM_CONTROL_SHUTTER 2
		#define INDYCAM_CONTROL_GAIN 3
		#define INDYCAM_CONTROL_RED_BALANCE 4
		#define INDYCAM_CONTROL_BLUE_BALANCE 5
		#define INDYCAM_CONTROL_RED_SATURATION 6
		#define INDYCAM_CONTROL_BLUE_SATURATION 7
		#define INDYCAM_CONTROL_GAMMA 8

		struct indycam_control {
		u8 type;
		s32 value;
		};

		#define DECODER_INDYCAM_GET_CONTROL _IOR('d', 193, struct indycam_control)
		#define DECODER_INDYCAM_SET_CONTROL _IOW('d', 194, struct indycam_control)

		#endif

drivers/media/video/saa7191.c

+417 −116

File changed.

Preview size limit exceeded, changes collapsed.

drivers/media/video/saa7191.h

+144 −28

Original line number	Diff line number	Diff line
		@@ -24,8 +24,8 @@
		#define SAA7191_REG_HPHI 0x05
		#define SAA7191_REG_LUMA 0x06
		#define SAA7191_REG_HUEC 0x07
		#define SAA7191_REG_CKTQ 0x08
		#define SAA7191_REG_CKTS 0x09
		#define SAA7191_REG_CKTQ 0x08 /* bits 3-7 */
		#define SAA7191_REG_CKTS 0x09 /* bits 3-7 */
		#define SAA7191_REG_PLSE 0x0a
		#define SAA7191_REG_SESE 0x0b
		#define SAA7191_REG_GAIN 0x0c
		@@ -43,30 +43,82 @@

		/* Status Register definitions */
		#define SAA7191_STATUS_CODE 0x01 /* color detected flag */
		#define SAA7191_STATUS_FIDT 0x20 /* format type NTSC/PAL */
		#define SAA7191_STATUS_HLCK 0x40 /* PLL unlocked/locked */
		#define SAA7191_STATUS_FIDT 0x20 /* signal type 50/60 Hz */
		#define SAA7191_STATUS_HLCK 0x40 /* PLL unlocked(1)/locked(0) */
		#define SAA7191_STATUS_STTC 0x80 /* tv/vtr time constant */

		/* Luminance Control Register definitions */
		/* input mode select bit:
		* 0=CVBS (chrominance trap active), 1=S-Video (trap bypassed) */
		#define SAA7191_LUMA_BYPS 0x80

		/* Chroma Gain Control Settings Register definitions */
		/* 0=automatic colour-killer enabled, 1=forced colour on */
		/* pre-filter (only when chrominance trap is active) */
		#define SAA7191_LUMA_PREF 0x40
		/* aperture bandpass to select different characteristics with maximums
		* (bits 4-5) */
		#define SAA7191_LUMA_BPSS_MASK 0x30
		#define SAA7191_LUMA_BPSS_SHIFT 4
		#define SAA7191_LUMA_BPSS_3 0x30
		#define SAA7191_LUMA_BPSS_2 0x20
		#define SAA7191_LUMA_BPSS_1 0x10
		#define SAA7191_LUMA_BPSS_0 0x00
		/* coring range for high frequency components according to 8-bit luminance
		* (bits 2-3)
		* 0=coring off, n= (+-)n LSB */
		#define SAA7191_LUMA_CORI_MASK 0x0c
		#define SAA7191_LUMA_CORI_SHIFT 2
		#define SAA7191_LUMA_CORI_3 0x0c
		#define SAA7191_LUMA_CORI_2 0x08
		#define SAA7191_LUMA_CORI_1 0x04
		#define SAA7191_LUMA_CORI_0 0x00
		/* aperture bandpass filter weights high frequency components of luminance
		* signal (bits 0-1)
		* 0=factor 0, 1=0.25, 2=0.5, 3=1 */
		#define SAA7191_LUMA_APER_MASK 0x03
		#define SAA7191_LUMA_APER_SHIFT 0
		#define SAA7191_LUMA_APER_3 0x03
		#define SAA7191_LUMA_APER_2 0x02
		#define SAA7191_LUMA_APER_1 0x01
		#define SAA7191_LUMA_APER_0 0x00

		/* Chrominance Gain Control Settings Register definitions */
		/* colour on: 0=automatic colour-killer enabled, 1=forced colour on */
		#define SAA7191_GAIN_COLO 0x80
		/* chrominance gain control (AGC filter)
		* 0=loop filter time constant slow, 1=medium, 2=fast, 3=actual gain */
		#define SAA7191_GAIN_LFIS_MASK 0x60
		#define SAA7191_GAIN_LFIS_SHIFT 5
		#define SAA7191_GAIN_LFIS_3 0x60
		#define SAA7191_GAIN_LFIS_2 0x40
		#define SAA7191_GAIN_LFIS_1 0x20
		#define SAA7191_GAIN_LFIS_0 0x00

		/* Standard/Mode Control Register definitions */
		/* tv/vtr mode bit: 0=TV mode (slow time constant),
		* 1=VTR mode (fast time constant) */
		#define SAA7191_STDC_VTRC 0x80
		/* SAA7191B-specific functions enable (RTCO, ODD and GPSW0 outputs)
		* 0=outputs set to high-impedance (circuit equals SAA7191), 1=enabled */
		#define SAA7191_STDC_NFEN 0x08
		/* HREF generation: 0=like SAA7191, 1=HREF is 8xLLC2 clocks earlier */
		#define SAA7191_STDC_HRMV 0x04
		/* general purpose switch 0
		* (not used with VINO afaik) */
		#define SAA7191_STDC_GPSW0 0x02
		/* SECAM mode bit: 0=other standards, 1=SECAM */
		#define SAA7191_STDC_SECS 0x01
		/* the bit fields above must be or'd with this value */
		#define SAA7191_STDC_VALUE 0x0c

		/* I/O and Clock Control Register definitions */
		/* horizontal clock PLL: 0=PLL closed,
		* 1=PLL circuit open and horizontal freq fixed */
		#define SAA7191_IOCK_HPLL 0x80
		/* colour-difference output enable (outputs UV0-UV7) */
		#define SAA7191_IOCK_OEDC 0x40
		/* H-sync output enable */
		#define SAA7191_IOCK_OEHS 0x20
		/* V-sync output enable */
		#define SAA7191_IOCK_OEVS 0x10
		/* luminance output enable (outputs Y0-Y7) */
		#define SAA7191_IOCK_OEDY 0x08
		/* S-VHS bit (chrominance from CVBS or from chrominance input):
		* 0=controlled by BYPS-bit, 1=from chrominance input */
		#define SAA7191_IOCK_CHRS 0x04
		@@ -83,11 +135,40 @@
		/* field select: (if AUFD=0)
		* 0=50Hz (625 lines), 1=60Hz (525 lines) */
		#define SAA7191_CTL3_FSEL 0x40
		/* the bit fields above must be or'd with this value */
		#define SAA7191_CTL3_VALUE 0x19
		/* SECAM cross-colour reduction enable */
		#define SAA7191_CTL3_SXCR 0x20
		/* sync and clamping pulse enable (HCL and HSY outputs) */
		#define SAA7191_CTL3_SCEN 0x10
		/* output format: 0=4:1:1, 1=4:2:2 (4:2:2 for VINO) */
		#define SAA7191_CTL3_OFTS 0x08
		/* luminance delay compensation
		* 0=02/LLC, 1=+12/LLC, 2=+22/LLC, 3=+32/LLC,
		* 4=-42/LLC, 5=-32/LLC, 6=-22/LLC, 7=-12/LLC
		* step size = 2/LLC = 67.8ns for 50Hz, 81.5ns for 60Hz */
		#define SAA7191_CTL3_YDEL_MASK 0x07
		#define SAA7191_CTL3_YDEL_SHIFT 0
		#define SAA7191_CTL3_YDEL2 0x04
		#define SAA7191_CTL3_YDEL1 0x02
		#define SAA7191_CTL3_YDEL0 0x01

		/* Miscellaneous Control #2 Register definitions */
		/* select HREF position
		* 0=normal, HREF is matched to YUV output port,
		* 1=HREF is matched to CVBS input port */
		#define SAA7191_CTL4_HRFS 0x04
		/* vertical noise reduction
		* 0=normal, 1=searching window, 2=auto-deflection, 3=reduction bypassed */
		#define SAA7191_CTL4_VNOI_MASK 0x03
		#define SAA7191_CTL4_VNOI_SHIFT 0
		#define SAA7191_CTL4_VNOI_3 0x03
		#define SAA7191_CTL4_VNOI_2 0x02
		#define SAA7191_CTL4_VNOI_1 0x01
		#define SAA7191_CTL4_VNOI_0 0x00

		/* Chrominance Gain Control Register definitions
		* (nominal value for UV CCIR level) */
		* - for QAM-modulated input signals, effects output amplitude
		* (SECAM gain fixed)
		* (nominal values for UV CCIR level) */
		#define SAA7191_CHCV_NTSC 0x2c
		#define SAA7191_CHCV_PAL 0x59

		@@ -99,16 +180,13 @@
		#define SAA7191_NORM_PAL 1
		#define SAA7191_NORM_NTSC 2
		#define SAA7191_NORM_SECAM 3

		#define SAA7191_VALUE_ENABLED 1
		#define SAA7191_VALUE_DISABLED 0
		#define SAA7191_VALUE_UNCHANGED -1
		#define SAA7191_NORM_AUTO_EXT 4 /* extended auto-detection */

		struct saa7191_status {
		/* 0=no signal, 1=signal active*/
		/* 0=no signal, 1=signal detected */
		int signal;
		/* 0=50hz (pal) signal, 1=60hz (ntsc) signal */
		int ntsc;
		int signal_60hz;
		/* 0=no color detected, 1=color detected */
		int color;

		@@ -118,6 +196,18 @@ struct saa7191_status {
		int norm;
		};

		#define SAA7191_BANDPASS_MIN 0x00
		#define SAA7191_BANDPASS_MAX 0x03
		#define SAA7191_BANDPASS_DEFAULT 0x00

		#define SAA7191_BANDPASS_WEIGHT_MIN 0x00
		#define SAA7191_BANDPASS_WEIGHT_MAX 0x03
		#define SAA7191_BANDPASS_WEIGHT_DEFAULT 0x01

		#define SAA7191_CORING_MIN 0x00
		#define SAA7191_CORING_MAX 0x03
		#define SAA7191_CORING_DEFAULT 0x00

		#define SAA7191_HUE_MIN 0x00
		#define SAA7191_HUE_MAX 0xff
		#define SAA7191_HUE_DEFAULT 0x80
		@@ -126,14 +216,40 @@ struct saa7191_status {
		#define SAA7191_VTRC_MAX 0x01
		#define SAA7191_VTRC_DEFAULT 0x00

		#define SAA7191_FORCE_COLOUR_MIN 0x00
		#define SAA7191_FORCE_COLOUR_MAX 0x01
		#define SAA7191_FORCE_COLOUR_DEFAULT 0x00

		#define SAA7191_CHROMA_GAIN_MIN 0x00
		#define SAA7191_CHROMA_GAIN_MAX 0x03
		#define SAA7191_CHROMA_GAIN_DEFAULT 0x00

		#define SAA7191_LUMA_DELAY_MIN -0x04
		#define SAA7191_LUMA_DELAY_MAX 0x03
		#define SAA7191_LUMA_DELAY_DEFAULT 0x01

		#define SAA7191_VNR_MIN 0x00
		#define SAA7191_VNR_MAX 0x03
		#define SAA7191_VNR_DEFAULT 0x00

		#define SAA7191_CONTROL_BANDPASS 0
		#define SAA7191_CONTROL_BANDPASS_WEIGHT 1
		#define SAA7191_CONTROL_CORING 2
		#define SAA7191_CONTROL_FORCE_COLOUR 3 /* boolean */
		#define SAA7191_CONTROL_CHROMA_GAIN 4
		#define SAA7191_CONTROL_HUE 5
		#define SAA7191_CONTROL_VTRC 6 /* boolean */
		#define SAA7191_CONTROL_LUMA_DELAY 7
		#define SAA7191_CONTROL_VNR 8

		struct saa7191_control {
		int hue;
		int vtrc;
		u8 type;
		s32 value;
		};

		#define DECODER_SAA7191_GET_STATUS _IOR('d', 195, struct saa7191_status)
		#define DECODER_SAA7191_SET_NORM _IOW('d', 196, int)
		#define DECODER_SAA7191_GET_CONTROLS _IOR('d', 197, struct saa7191_control)
		#define DECODER_SAA7191_SET_CONTROLS _IOW('d', 198, struct saa7191_control)
		#define DECODER_SAA7191_GET_CONTROL _IOR('d', 197, struct saa7191_control)
		#define DECODER_SAA7191_SET_CONTROL _IOW('d', 198, struct saa7191_control)

		#endif

drivers/media/video/vino.c

+779 −391

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