Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a627f025 authored by yangbo lu's avatar yangbo lu Committed by Ulf Hansson
Browse files

mmc: sdhci-of-esdhc: limit SD clock for ls1012a/ls1046a 



The ls1046a datasheet specified that the max SD clock frequency
for eSDHC SDR104/HS200 was 167MHz, and the ls1012a datasheet
specified it's 125MHz for ls1012a. So this patch is to add the
limitation.

Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent e145ac45

drivers/mmc/host/sdhci-of-esdhc.c

+14 −0
Original line number Diff line number Diff line
@@ -457,6 +457,20 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock) 
	if (esdhc->vendor_ver < VENDOR_V_23)

		pre_div = 2;



	/*

	 * Limit SD clock to 167MHz for ls1046a according to its datasheet

	 */

	if (clock > 167000000 &&

	    of_find_compatible_node(NULL, NULL, "fsl,ls1046a-esdhc"))

		clock = 167000000;



	/*

	 * Limit SD clock to 125MHz for ls1012a according to its datasheet

	 */

	if (clock > 125000000 &&

	    of_find_compatible_node(NULL, NULL, "fsl,ls1012a-esdhc"))

		clock = 125000000;



	/* Workaround to reduce the clock frequency for p1010 esdhc */

	if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {

		if (clock > 20000000)