Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a5af1fb9 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by David S. Miller
Browse files

dt-bindings: net: meson-dwmac: add support for the Meson8m2 SoC



The Meson8m2 SoC uses a similar (potentially even identical) register
layout for the dwmac glue as Meson8b and GXBB. Unfortunately there is no
documentation available.
Testing shows that both, RMII and RGMII PHYs are working if they are
configured as on Meson8b. Add a new compatible string to the
documentation so differences (if there are any) between Meson8m2 and the
other SoCs can be taken care of within the driver.

Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c0b6edef
Loading
Loading
Loading
Loading
+3 −2
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ Required properties on all platforms:
- compatible:	Depending on the platform this should be one of:
			- "amlogic,meson6-dwmac"
			- "amlogic,meson8b-dwmac"
			- "amlogic,meson8m2-dwmac"
			- "amlogic,meson-gxbb-dwmac"
		Additionally "snps,dwmac" and any applicable more
		detailed version number described in net/stmmac.txt
@@ -19,13 +20,13 @@ Required properties on all platforms:
	configuration (for example the PRG_ETHERNET register range
	on Meson8b and newer)

Required properties on Meson8b and newer:
Required properties on Meson8b, Meson8m2, GXBB and newer:
- clock-names:	Should contain the following:
		- "stmmaceth" - see stmmac.txt
		- "clkin0" - first parent clock of the internal mux
		- "clkin1" - second parent clock of the internal mux

Optional properties on Meson8b and newer:
Optional properties on Meson8b, Meson8m2, GXBB and newer:
- amlogic,tx-delay-ns:	The internal RGMII TX clock delay (provided
			by this driver) in nanoseconds. Allowed values
			are: 0ns, 2ns, 4ns, 6ns.