Commit a555c115 authored Mar 27, 2018 by Aditya Bavanari Committed by Gerrit - the friendly Code Review server Nov 23, 2020

asoc: codecs: sdm660_cdc: Fix LPASS register access during PDR



When AFE returns failure in setting the digital codec
core clock during PDR, it leads to LPASS register access
which results in NOC error and AHB timeout. Put the regmap
in cache only mode during clock set failure to fix this.

Change-Id: I221bf02f32b1dae19a02435220dec8a85f5dd998
Signed-off-by: Aditya Bavanari <abavanar@codeaurora.org>

parent d62420be

asoc/codecs/sdm660_cdc/msm-digital-cdc.c

+4 −3

Original line number	Diff line number	Diff line
		@@ -93,11 +93,12 @@ static int msm_digcdc_clock_control(bool flag)
		__func__);
		/*
		* Avoid access to lpass register
		* as clock enable failed during SSR.
		* as clock enable failed during SSR/PDR.
		*/
		if (ret == -ENODEV)
		msm_dig_cdc->regmap->cache_only = true;
		return ret;
		} else {
		msm_dig_cdc->regmap->cache_only = false;
		}
		pr_debug("enabled digital codec core clk\n");
		atomic_set(&pdata->int_mclk0_enabled, true);