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Commit a51ed6cf authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'renesas-dt2-for-v4.12' of...

Merge tag 'renesas-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Second Round of Renesas ARM Based SoC DT Updates for v4.12

Corrections:
* Correct clock frequency of X2 DU clock input for r8a7791/koelsch board
* Correct Z clock for r8a7792 SoC
* Correct parent of SSI[0-9] clocks for r8a779[013] SoCs
* Correct ethernet clock parent on r7s72100 SoC
* Correct DU clock for r8a7794/silk board

Cleanups:
* Drop _clk suffix from external CAN clock node name on r8a779[01] SoCs

Enhancements:
* Enable rtc r7s72100/genmai board
* Add Z2 clock for r8a7794 SoC
* Add DU clock for r8a7794 SoC
* Add power-domains to SDHI for r8a7794 and r7s72100 SoCs
* Add reset control properties for r8a774[35] SoCs

* tag 'renesas-dt2-for-v4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

: (22 commits)
  ARM: dts: r8a7791: Drop _clk suffix from external CAN clock node name
  ARM: dts: r8a7790: Drop _clk suffix from external CAN clock node name
  ARM: dts: genmai: Enable rtc and rtc_x1 clock
  ARM: dts: rskrza1: add rtc DT support
  ARM: dts: rskrza1: set rtc_x1 clock value
  ARM: dts: r7s72100: add rtc to device tree
  ARM: dts: r7s72100: add RTC_X clock inputs to device tree
  ARM: dts: r7s72100: add rtc clock to device tree
  ARM: dts: koelsch: Correct clock frequency of X2 DU clock input
  ARM: dts: r8a7794: Add Z2 clock
  ARM: dts: r8a7792: Correct Z clock
  ARM: dts: r8a7793: Correct parent of SSI[0-9] clocks
  ARM: dts: r8a7791: Correct parent of SSI[0-9] clocks
  ARM: dts: r8a7790: Correct parent of SSI[0-9] clocks
  ARM: dts: r7s72100: fix ethernet clock parent
  ARM: dts: silk: Correct clock of DU1
  ARM: dts: alt: Correct clock of DU1
  ARM: dts: r8a7794: Correct clock of DU1
  ARM: dts: r8a7794: Add DU1 clock to device tree
  ARM: dts: r7s72100: add power-domains to sdhi
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 9ef0f50a eb77d726
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+8 −0
Original line number Diff line number Diff line
@@ -44,6 +44,10 @@
	clock-frequency = <48000000>;
};

&rtc_x1_clk {
	clock-frequency = <32768>;
};

&mtu2 {
	status = "okay";
};
@@ -59,6 +63,10 @@
	};
};

&rtc {
	status = "okay";
};

&scif2 {
	status = "okay";
};
+8 −0
Original line number Diff line number Diff line
@@ -43,6 +43,10 @@
	clock-frequency = <48000000>;
};

&rtc_x1_clk {
	clock-frequency = <32768>;
};

&mtu2 {
	status = "okay";
};
@@ -69,6 +73,10 @@
	status = "okay";
};

&rtc {
	status = "okay";
};

&scif2 {
	status = "okay";
};
+40 −1
Original line number Diff line number Diff line
@@ -51,6 +51,20 @@
			clock-frequency = <0>;
		};

		rtc_x1_clk: rtc_x1 {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			/* If clk present, value must be set by board to 32678 */
			clock-frequency = <0>;
		};

		rtc_x3_clk: rtc_x3 {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			/* If clk present, value must be set by board to 4000000 */
			clock-frequency = <0>;
		};

		/* Fixed factor clocks */
		b_clk: b {
			#clock-cells = <0>;
@@ -117,11 +131,20 @@
			clock-output-names = "ostm0", "ostm1";
		};

		mstp6_clks: mstp6_clks@fcfe042c {
			#clock-cells = <1>;
			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
			reg = <0xfcfe042c 4>;
			clocks = <&p0_clk>;
			clock-indices = <R7S72100_CLK_RTC>;
			clock-output-names = "rtc";
		};

		mstp7_clks: mstp7_clks@fcfe0430 {
			#clock-cells = <1>;
			compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
			reg = <0xfcfe0430 4>;
			clocks = <&p0_clk>;
			clocks = <&b_clk>;
			clock-indices = <R7S72100_CLK_ETHER>;
			clock-output-names = "ether";
		};
@@ -501,6 +524,7 @@
		clocks = <&mstp12_clks R7S72100_CLK_SDHI00>,
			 <&mstp12_clks R7S72100_CLK_SDHI01>;
		clock-names = "core", "cd";
		power-domains = <&cpg_clocks>;
		cap-sd-highspeed;
		cap-sdio-irq;
		status = "disabled";
@@ -516,6 +540,7 @@
		clocks = <&mstp12_clks R7S72100_CLK_SDHI10>,
			 <&mstp12_clks R7S72100_CLK_SDHI11>;
		clock-names = "core", "cd";
		power-domains = <&cpg_clocks>;
		cap-sd-highspeed;
		cap-sdio-irq;
		status = "disabled";
@@ -538,4 +563,18 @@
		power-domains = <&cpg_clocks>;
		status = "disabled";
	};

	rtc: rtc@fcff1000 {
		compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
		reg = <0xfcff1000 0x2e>;
		interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING
			      GIC_SPI 277 IRQ_TYPE_EDGE_RISING
			      GIC_SPI 278 IRQ_TYPE_EDGE_RISING>;
		interrupt-names = "alarm", "period", "carry";
		clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,
			 <&rtc_x3_clk>, <&extal_clk>;
		clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
		power-domains = <&cpg_clocks>;
		status = "disabled";
	};
};
+24 −0
Original line number Diff line number Diff line
@@ -62,6 +62,7 @@
			clocks = <&cpg CPG_MOD 408>;
			clock-names = "clk";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 408>;
		};

		irqc: interrupt-controller@e61c0000 {
@@ -81,6 +82,7 @@
				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 407>;
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 407>;
		};

		timer {
@@ -102,6 +104,7 @@
			clock-names = "extal", "usb_extal";
			#clock-cells = <2>;
			#power-domain-cells = <0>;
			#reset-cells = <1>;
		};

		prr: chipid@ff000044 {
@@ -148,6 +151,7 @@
			clocks = <&cpg CPG_MOD 219>;
			clock-names = "fck";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 219>;
			#dma-cells = <1>;
			dma-channels = <15>;
		};
@@ -180,6 +184,7 @@
			clocks = <&cpg CPG_MOD 218>;
			clock-names = "fck";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 218>;
			#dma-cells = <1>;
			dma-channels = <15>;
		};
@@ -195,6 +200,7 @@
			       <&dmac1 0x21>, <&dmac1 0x22>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 204>;
			status = "disabled";
		};

@@ -209,6 +215,7 @@
			       <&dmac1 0x25>, <&dmac1 0x26>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 203>;
			status = "disabled";
		};

@@ -223,6 +230,7 @@
			       <&dmac1 0x27>, <&dmac1 0x28>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 202>;
			status = "disabled";
		};

@@ -237,6 +245,7 @@
			       <&dmac1 0x1b>, <&dmac1 0x1c>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 1106>;
			status = "disabled";
		};

@@ -251,6 +260,7 @@
			       <&dmac1 0x1f>, <&dmac1 0x20>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 1107>;
			status = "disabled";
		};

@@ -265,6 +275,7 @@
			       <&dmac1 0x23>, <&dmac1 0x24>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 1108>;
			status = "disabled";
		};

@@ -279,6 +290,7 @@
			       <&dmac1 0x3d>, <&dmac1 0x3e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 206>;
			status = "disabled";
		};

@@ -293,6 +305,7 @@
			       <&dmac1 0x19>, <&dmac1 0x1a>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 207>;
			status = "disabled";
		};

@@ -307,6 +320,7 @@
			       <&dmac1 0x1d>, <&dmac1 0x1e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 216>;
			status = "disabled";
		};

@@ -322,6 +336,7 @@
			       <&dmac1 0x29>, <&dmac1 0x2a>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 721>;
			status = "disabled";
		};

@@ -337,6 +352,7 @@
			       <&dmac1 0x2d>, <&dmac1 0x2e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 720>;
			status = "disabled";
		};

@@ -352,6 +368,7 @@
			       <&dmac1 0x2b>, <&dmac1 0x2c>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 719>;
			status = "disabled";
		};

@@ -367,6 +384,7 @@
			       <&dmac1 0x2f>, <&dmac1 0x30>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 718>;
			status = "disabled";
		};

@@ -382,6 +400,7 @@
			       <&dmac1 0xfb>, <&dmac1 0xfc>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 715>;
			status = "disabled";
		};

@@ -397,6 +416,7 @@
			       <&dmac1 0xfd>, <&dmac1 0xfe>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 714>;
			status = "disabled";
		};

@@ -412,6 +432,7 @@
			       <&dmac1 0x39>, <&dmac1 0x3a>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 717>;
			status = "disabled";
		};

@@ -427,6 +448,7 @@
			       <&dmac1 0x4d>, <&dmac1 0x4e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 716>;
			status = "disabled";
		};

@@ -442,6 +464,7 @@
			       <&dmac1 0x3b>, <&dmac1 0x3c>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 713>;
			status = "disabled";
		};

@@ -451,6 +474,7 @@
			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 813>;
			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
			resets = <&cpg 813>;
			phy-mode = "rmii";
			#address-cells = <1>;
			#size-cells = <0>;
+24 −0
Original line number Diff line number Diff line
@@ -62,6 +62,7 @@
			clocks = <&cpg CPG_MOD 408>;
			clock-names = "clk";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 408>;
		};

		irqc: interrupt-controller@e61c0000 {
@@ -81,6 +82,7 @@
				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 407>;
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 407>;
		};

		timer {
@@ -102,6 +104,7 @@
			clock-names = "extal", "usb_extal";
			#clock-cells = <2>;
			#power-domain-cells = <0>;
			#reset-cells = <1>;
		};

		prr: chipid@ff000044 {
@@ -148,6 +151,7 @@
			clocks = <&cpg CPG_MOD 219>;
			clock-names = "fck";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 219>;
			#dma-cells = <1>;
			dma-channels = <15>;
		};
@@ -180,6 +184,7 @@
			clocks = <&cpg CPG_MOD 218>;
			clock-names = "fck";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 218>;
			#dma-cells = <1>;
			dma-channels = <15>;
		};
@@ -195,6 +200,7 @@
			       <&dmac1 0x21>, <&dmac1 0x22>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 204>;
			status = "disabled";
		};

@@ -209,6 +215,7 @@
			       <&dmac1 0x25>, <&dmac1 0x26>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 203>;
			status = "disabled";
		};

@@ -223,6 +230,7 @@
			       <&dmac1 0x27>, <&dmac1 0x28>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 202>;
			status = "disabled";
		};

@@ -237,6 +245,7 @@
			       <&dmac1 0x1b>, <&dmac1 0x1c>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 1106>;
			status = "disabled";
		};

@@ -251,6 +260,7 @@
			       <&dmac1 0x1f>, <&dmac1 0x20>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 1107>;
			status = "disabled";
		};

@@ -265,6 +275,7 @@
			       <&dmac1 0x23>, <&dmac1 0x24>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 1108>;
			status = "disabled";
		};

@@ -279,6 +290,7 @@
			       <&dmac1 0x3d>, <&dmac1 0x3e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 206>;
			status = "disabled";
		};

@@ -293,6 +305,7 @@
			       <&dmac1 0x19>, <&dmac1 0x1a>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 207>;
			status = "disabled";
		};

@@ -307,6 +320,7 @@
			       <&dmac1 0x1d>, <&dmac1 0x1e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 216>;
			status = "disabled";
		};

@@ -322,6 +336,7 @@
			       <&dmac1 0x29>, <&dmac1 0x2a>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 721>;
			status = "disabled";
		};

@@ -337,6 +352,7 @@
			       <&dmac1 0x2d>, <&dmac1 0x2e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 720>;
			status = "disabled";
		};

@@ -352,6 +368,7 @@
			       <&dmac1 0x2b>, <&dmac1 0x2c>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 719>;
			status = "disabled";
		};

@@ -367,6 +384,7 @@
			       <&dmac1 0x2f>, <&dmac1 0x30>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 718>;
			status = "disabled";
		};

@@ -382,6 +400,7 @@
			       <&dmac1 0xfb>, <&dmac1 0xfc>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 715>;
			status = "disabled";
		};

@@ -397,6 +416,7 @@
			       <&dmac1 0xfd>, <&dmac1 0xfe>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 714>;
			status = "disabled";
		};

@@ -412,6 +432,7 @@
			       <&dmac1 0x39>, <&dmac1 0x3a>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 717>;
			status = "disabled";
		};

@@ -427,6 +448,7 @@
			       <&dmac1 0x4d>, <&dmac1 0x4e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 716>;
			status = "disabled";
		};

@@ -442,6 +464,7 @@
			       <&dmac1 0x3b>, <&dmac1 0x3c>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 713>;
			status = "disabled";
		};

@@ -451,6 +474,7 @@
			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 813>;
			power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
			resets = <&cpg 813>;
			phy-mode = "rmii";
			#address-cells = <1>;
			#size-cells = <0>;
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