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Commit a511e793 authored by Fenghua Yu's avatar Fenghua Yu Committed by Thomas Gleixner
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x86/intel_rdt: Enumerate L2 Code and Data Prioritization (CDP) feature 



L2 Code and Data Prioritization (CDP) is enumerated in
CPUID(EAX=0x10, ECX=0x2):ECX.bit2

Signed-off-by: default avatarFenghua Yu <fenghua.yu@intel.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
Cc: "Tony Luck" <tony.luck@intel.com>
Cc: Vikas" <vikas.shivappa@intel.com>
Cc: Sai Praneeth" <sai.praneeth.prakhya@intel.com>
Cc: Reinette" <reinette.chatre@intel.com>
Link: https://lkml.kernel.org/r/1513810644-78015-4-git-send-email-fenghua.yu@intel.com
parent aa55d5a4

arch/x86/include/asm/cpufeatures.h

+1 −0
Original line number Diff line number Diff line
@@ -206,6 +206,7 @@ 
#define X86_FEATURE_RETPOLINE		( 7*32+12) /* Generic Retpoline mitigation for Spectre variant 2 */

#define X86_FEATURE_RETPOLINE_AMD	( 7*32+13) /* AMD Retpoline mitigation for Spectre variant 2 */

#define X86_FEATURE_INTEL_PPIN		( 7*32+14) /* Intel Processor Inventory Number */

#define X86_FEATURE_CDP_L2		( 7*32+15) /* Code and Data Prioritization L2 */

#define X86_FEATURE_AVX512_4VNNIW	( 7*32+16) /* AVX-512 Neural Network Instructions */

#define X86_FEATURE_AVX512_4FMAPS	( 7*32+17) /* AVX-512 Multiply Accumulation Single precision */

arch/x86/kernel/cpu/scattered.c

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ static const struct cpuid_bit cpuid_bits[] = { 
	{ X86_FEATURE_CAT_L3,		CPUID_EBX,  1, 0x00000010, 0 },

	{ X86_FEATURE_CAT_L2,		CPUID_EBX,  2, 0x00000010, 0 },

	{ X86_FEATURE_CDP_L3,		CPUID_ECX,  2, 0x00000010, 1 },

	{ X86_FEATURE_CDP_L2,		CPUID_ECX,  2, 0x00000010, 2 },

	{ X86_FEATURE_MBA,		CPUID_EBX,  3, 0x00000010, 0 },

	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },

	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },