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Commit a4c34ff1 authored by Joerg Roedel's avatar Joerg Roedel
Browse files

iommu/vt-d: Enable QI on all IOMMUs before setting root entry 



This seems to be required on some X58 chipsets on systems
with more than one IOMMU. QI does not work until it is
enabled on all IOMMUs in the system.

Reported-by: default avatarDheeraj CVR <cvr.dheeraj@gmail.com>
Tested-by: default avatarDheeraj CVR <cvr.dheeraj@gmail.com>
Fixes: 5f0a7f76 ('iommu/vt-d: Make root entry visible for hardware right after allocation')
Cc: stable@vger.kernel.org
Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent ae8a7910

drivers/iommu/intel-iommu.c

+12 −5
Original line number Diff line number Diff line
@@ -3222,11 +3222,6 @@ static int __init init_dmars(void) 
			}

		}



		iommu_flush_write_buffer(iommu);

		iommu_set_root_entry(iommu);

		iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL);

		iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);



		if (!ecap_pass_through(iommu->ecap))

			hw_pass_through = 0;

#ifdef CONFIG_INTEL_IOMMU_SVM
@@ -3235,6 +3230,18 @@ static int __init init_dmars(void) 
#endif

	}



	/*

	 * Now that qi is enabled on all iommus, set the root entry and flush

	 * caches. This is required on some Intel X58 chipsets, otherwise the

	 * flush_context function will loop forever and the boot hangs.

	 */

	for_each_active_iommu(iommu, drhd) {

		iommu_flush_write_buffer(iommu);

		iommu_set_root_entry(iommu);

		iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL);

		iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);

	}



	if (iommu_pass_through)

		iommu_identity_mapping |= IDENTMAP_ALL;