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Commit a4a741a0 authored by Paul Mackerras's avatar Paul Mackerras
Browse files

Merge remote-tracking branch 'remotes/powerpc/topic/ppc-kvm' into kvm-ppc-next 



This merges in a fix which touches both PPC and KVM code,
which was therefore put into a topic branch in the powerpc
tree.

Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
parents 050f2339 ab9bad0e

arch/powerpc/include/asm/exception-64s.h

+8 −0
Original line number Diff line number Diff line
@@ -236,6 +236,11 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) 
	mtctr	reg;							\

	bctr



#define BRANCH_LINK_TO_FAR(reg, label)					\

	__LOAD_FAR_HANDLER(reg, label);					\

	mtctr	reg;							\

	bctrl



/*

 * KVM requires __LOAD_FAR_HANDLER.

 *
@@ -260,6 +265,9 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) 
#define BRANCH_TO_COMMON(reg, label)					\

	b	label



#define BRANCH_LINK_TO_FAR(reg, label)					\

	bl	label



#define BRANCH_TO_KVM(reg, label)					\

	b	label

arch/powerpc/include/asm/opal.h

+0 −7
Original line number Diff line number Diff line
@@ -67,7 +67,6 @@ int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func, 
int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func,

				   uint64_t offset, uint32_t data);

int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);

int64_t opal_rm_set_xive(uint32_t isn, uint16_t server, uint8_t priority);

int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority);

int64_t opal_register_exception_handler(uint64_t opal_exception,

					uint64_t handler_address,
@@ -220,18 +219,12 @@ int64_t opal_pci_set_power_state(uint64_t async_token, uint64_t id, 
int64_t opal_pci_poll2(uint64_t id, uint64_t data);



int64_t opal_int_get_xirr(uint32_t *out_xirr, bool just_poll);

int64_t opal_rm_int_get_xirr(__be32 *out_xirr, bool just_poll);

int64_t opal_int_set_cppr(uint8_t cppr);

int64_t opal_int_eoi(uint32_t xirr);

int64_t opal_rm_int_eoi(uint32_t xirr);

int64_t opal_int_set_mfrr(uint32_t cpu, uint8_t mfrr);

int64_t opal_rm_int_set_mfrr(uint32_t cpu, uint8_t mfrr);

int64_t opal_pci_tce_kill(uint64_t phb_id, uint32_t kill_type,

			  uint32_t pe_num, uint32_t tce_size,

			  uint64_t dma_addr, uint32_t npages);

int64_t opal_rm_pci_tce_kill(uint64_t phb_id, uint32_t kill_type,

			     uint32_t pe_num, uint32_t tce_size,

			     uint64_t dma_addr, uint32_t npages);



/* Internal functions */

extern int early_init_dt_scan_opal(unsigned long node, const char *uname,

arch/powerpc/kernel/exceptions-64s.S

+1 −1
Original line number Diff line number Diff line
@@ -982,7 +982,7 @@ TRAMP_REAL_BEGIN(hmi_exception_early) 
	EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)

	EXCEPTION_PROLOG_COMMON_3(0xe60)

	addi	r3,r1,STACK_FRAME_OVERHEAD

	bl	hmi_exception_realmode

	BRANCH_LINK_TO_FAR(r4, hmi_exception_realmode)

	/* Windup the stack. */

	/* Move original HSRR0 and HSRR1 into the respective regs */

	ld	r9,_MSR(r1)

arch/powerpc/kernel/idle_book3s.S

+3 −3
Original line number Diff line number Diff line
@@ -250,7 +250,7 @@ fastsleep_workaround_at_entry: 
	/* Fast sleep workaround */

	li	r3,1

	li	r4,1

	bl	opal_rm_config_cpu_idle_state

	bl	opal_config_cpu_idle_state



	/* Clear Lock bit */

	li	r0,0
@@ -544,7 +544,7 @@ timebase_resync: 
	 */

	ble	cr3,clear_lock

	/* Time base re-sync */

	bl	opal_rm_resync_timebase;

	bl	opal_resync_timebase;

	/*

	 * If waking up from sleep, per core state is not lost, skip to

	 * clear_lock.
@@ -633,7 +633,7 @@ hypervisor_state_restored: 
fastsleep_workaround_at_exit:

	li	r3,1

	li	r4,0

	bl	opal_rm_config_cpu_idle_state

	bl	opal_config_cpu_idle_state

	b	timebase_resync



/*

arch/powerpc/kvm/book3s_hv_builtin.c

+9 −25
Original line number Diff line number Diff line
@@ -29,11 +29,6 @@ 
#include <asm/opal.h>

#include <asm/smp.h>



static bool in_realmode(void)

{

	return !(mfmsr() & MSR_IR);

}



#define KVM_CMA_CHUNK_ORDER	18



/*
@@ -230,13 +225,10 @@ void kvmhv_rm_send_ipi(int cpu) 


	/* Else poke the target with an IPI */

	xics_phys = paca[cpu].kvm_hstate.xics_phys;

	if (!in_realmode())

		opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY);

	else if (xics_phys)

	if (xics_phys)

		rm_writeb(xics_phys + XICS_MFRR, IPI_PRIORITY);

	else

		opal_rm_int_set_mfrr(get_hard_smp_processor_id(cpu),

				     IPI_PRIORITY);

		opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY);

}



/*
@@ -419,10 +411,8 @@ static long kvmppc_read_one_intr(bool *again) 
	/* Now read the interrupt from the ICP */

	xics_phys = local_paca->kvm_hstate.xics_phys;

	rc = 0;

	if (!in_realmode())

	if (!xics_phys)

		rc = opal_int_get_xirr(&xirr, false);

	else if (!xics_phys)

		rc = opal_rm_int_get_xirr(&xirr, false);

	else

		xirr = _lwzcix(xics_phys + XICS_XIRR);

	if (rc < 0)
@@ -453,15 +443,12 @@ static long kvmppc_read_one_intr(bool *again) 
	 */

	if (xisr == XICS_IPI) {

		rc = 0;

		if (!in_realmode()) {

			opal_int_set_mfrr(hard_smp_processor_id(), 0xff);

			rc = opal_int_eoi(h_xirr);

		} else if (xics_phys) {

		if (xics_phys) {

			_stbcix(xics_phys + XICS_MFRR, 0xff);

			_stwcix(xics_phys + XICS_XIRR, xirr);

		} else {

			opal_rm_int_set_mfrr(hard_smp_processor_id(), 0xff);

			rc = opal_rm_int_eoi(h_xirr);

			opal_int_set_mfrr(hard_smp_processor_id(), 0xff);

			rc = opal_int_eoi(h_xirr);

		}

		/* If rc > 0, there is another interrupt pending */

		*again = rc > 0;
@@ -482,13 +469,10 @@ static long kvmppc_read_one_intr(bool *again) 
			/* We raced with the host,

			 * we need to resend that IPI, bummer

			 */

			if (!in_realmode())

				opal_int_set_mfrr(hard_smp_processor_id(),

						  IPI_PRIORITY);

			else if (xics_phys)

			if (xics_phys)

				_stbcix(xics_phys + XICS_MFRR, IPI_PRIORITY);

			else

				opal_rm_int_set_mfrr(hard_smp_processor_id(),

				opal_int_set_mfrr(hard_smp_processor_id(),

						  IPI_PRIORITY);

			/* Let side effects complete */

			smp_mb();