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Commit a427293f authored by Graf Yang's avatar Graf Yang Committed by Mike Frysinger
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Blackfin: bf518f-ezbrd: fix SPI CS for SPI flash 

The SPI flash on the BF518F-EZBRD board is actually hooked up to CS2,
not CS1, so make sure the resources are correct.

URL: http://blackfin.uclinux.org/gf/tracker/5220


Signed-off-by: default avatarGraf Yang <graf.yang@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent 53122693

arch/blackfin/mach-bf518/boards/ezbrd.c

+1 −1
Original line number Diff line number Diff line
@@ -246,7 +246,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { 
		.modalias = "m25p80", /* Name of spi_driver for this device */

		.max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */

		.bus_num = 0, /* Framework bus number */

		.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/

		.chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */

		.platform_data = &bfin_spi_flash_data,

		.controller_data = &spi_flash_chip_info,

		.mode = SPI_MODE_3,