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Commit a3fd6c8d authored by Chetan C R's avatar Chetan C R
Browse files

ARM: dts: msm: Add cpucc support for SDM439 

Add cpu clock controller support for SDM429 and
SDM439 targets.

Change-Id: I0dd455dd1734ed083965878167f51dfef5051e19
parent e6396558

qcom/msm8917.dtsi

+4 −3
Original line number Diff line number Diff line
@@ -573,7 +573,7 @@ 
	};



	debugcc: qcom,cc-debug {

		compatible = "qcom,msm8917-debugcc";

		compatible = "qcom,qm215-debugcc";

		reg = <0x1874000 0x4>,

		      <0xb01101c 0x8>;

		reg-names = "cc_base", "meas";
@@ -597,9 +597,10 @@ 
		compatible = "qcom,cpu-clock-qm215";

		reg =   <0xb011050 0x8>,

			<0xb016000 0x34>,

			<0x00a412c 0x8>;

			<0x00a412c 0x8>,

			<0xb011200 0x100>;

		reg-names = "apcs-c1-rcg-base",

			"apcs_pll", "efuse";

			"apcs_pll1", "efuse", "spm_c1_base";

		cpu-vdd-supply = <&apc_vreg_corner>;

		vdd_dig_ao-supply = <&pm8916_s1_level_ao>;

		vdd_hf_pll-supply = <&pm8916_l7_ao>;

qcom/msm8937-interposer-sdm429.dtsi

+1 −1
Original line number Diff line number Diff line 
#include "msm8937-interposer-sdm439.dtsi"

#include "sdm429-cpu.dtsi"



&clock_cpu {

&apsscc {

	qcom,cpu-isolation {

		/delete-node/ cpu4-isolate;

		/delete-node/ cpu5-isolate;

qcom/msm8937-interposer-sdm439.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -159,9 +159,9 @@ 
		qcom,cpr-enable;

	};



	qcom,cpu-clock-8939@b111050 {

	qcom,clock-cpu@b111050 {

		vdd-c0-supply = <&apc_vreg_corner>;

		vdd-c1-supply = <&apc_vreg_corner>;

		cpu-vdd-supply = <&apc_vreg_corner>;

		vdd-cci-supply = <&apc_vreg_corner>;

	};

};

qcom/msm8937-thermal.dtsi

+1 −1
Original line number Diff line number Diff line 
#include <dt-bindings/thermal/thermal.h>



&clock_cpu {

&apsscc {

	qcom,cpu-isolation {

		compatible = "qcom,cpu-isolate";

		cpu0_isolate: cpu0-isolate {

qcom/msm8937.dtsi

+18 −12
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ 
#include <dt-bindings/spmi/spmi.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/clock/qcom,gcc-sdm429w.h>

#include <dt-bindings/clock/qcom,cpu-sdm.h>

#include <dt-bindings/clock/qcom,rpmcc.h>

#include <dt-bindings/clock/mdss-28nm-pll-clk-legacy.h>
@@ -584,12 +585,15 @@ 
		#reset-cells = <1>;

	};



	cpu_debug: syscon@0b11101c {

		compatible = "syscon";

		reg = <0xb11101c 0x4>;

	};



	debugcc: qcom,cc-debug {

		compatible = "qcom,msm8937-debugcc";

		reg = <0x1874000 0x4>,

			<0xb11101c 0x8>;

		reg-names = "cc_base", "meas";

		compatible = "qcom,sdm439-debugcc";

		qcom,gcc = <&gcc>;

		qcom,cpu = <&cpu_debug>;

		clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;

		clock-names = "xo_clk_src";

		#clock-cells = <1>;
@@ -607,17 +611,19 @@ 
		#clock-cells = <1>;

	};



	clock_cpu: qcom,cpu-clock-8939@b111050 {

		compatible = "qcom,cpu-clock-8939";

	apsscc: qcom,clock-cpu@b111050 {

		compatible = "qcom,cpu-clock-sdm439";

		reg =   <0xb011050 0x8>,

			<0xb111050 0x8>,

			<0xb016000 0x34>,

			<0xb011200 0x100>,

			<0xb1d1050 0x8>,

			<0xb111050 0x8>,

			<0xb116000 0x34>,

			<0xb111200 0x100>,

			<0x00a412c 0x8>;

		reg-names = "apcs-c1-rcg-base", "apcs-c0-rcg-base",

				"apcs-cci-rcg-base", "efuse";

		vdd-c0-supply = <&apc_vreg_corner>;

		vdd-c1-supply = <&apc_vreg_corner>;

		vdd-cci-supply = <&apc_vreg_corner>;

		reg-names = "apcs-c1-rcg-base", "apcs_pll1", "spm_c1_base",

			"apcs-cci-rcg-base", "apcs-c0-rcg-base",

			"apcs_pll0", "spm_c0_base", "efuse";

		clocks = <&rpmcc RPM_SMD_XO_A_CLK_SRC>,

			<&gcc GPLL0_AO_OUT_MAIN>;

		clock-names = "xo_ao", "gpll0_ao" ;