Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a3a8986c authored by Mahesh Kumar's avatar Mahesh Kumar Committed by Paulo Zanoni
Browse files

drm/i915/bxt: IPC WA for Broxton



Display Workarounds #1135
If IPC is enabled in BXT, display underruns are observed.
WA: The Line Time programmed in the WM_LINETIME register should be
half of the actual calculated Line Time.

Programmed Line Time = 1/2*Calculated Line Time

Changes since V1:
 - Add Workaround number in commit & code
Changes since V2 (from Paulo):
 - Bikeshed white space and make the WA tag look like the others

Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarMahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161201154940.24446-3-mahesh1.kumar@intel.com
parent ef8a4fb4
Loading
Loading
Loading
Loading
+2 −0
Original line number Diff line number Diff line
@@ -1239,6 +1239,8 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)

	intel_runtime_pm_enable(dev_priv);

	dev_priv->ipc_enabled = false;

	/* Everything is in place, we can now relax! */
	DRM_INFO("Initialized %s %d.%d.%d %s for %s on minor %d\n",
		 driver.name, driver.major, driver.minor, driver.patchlevel,
+2 −0
Original line number Diff line number Diff line
@@ -2329,6 +2329,8 @@ struct drm_i915_private {
	/* perform PHY state sanity checks? */
	bool chv_phy_assert[2];

	bool ipc_enabled;

	/* Used to save the pipe-to-encoder mapping for audio */
	struct intel_encoder *av_enc_map[I915_MAX_PIPES];

+11 −2
Original line number Diff line number Diff line
@@ -3761,7 +3761,10 @@ skl_compute_wm_level(const struct drm_i915_private *dev_priv,
static uint32_t
skl_compute_linetime_wm(struct intel_crtc_state *cstate)
{
	struct drm_atomic_state *state = cstate->base.state;
	struct drm_i915_private *dev_priv = to_i915(state->dev);
	uint32_t pixel_rate;
	uint32_t linetime_wm;

	if (!cstate->base.active)
		return 0;
@@ -3771,8 +3774,14 @@ skl_compute_linetime_wm(struct intel_crtc_state *cstate)
	if (WARN_ON(pixel_rate == 0))
		return 0;

	return DIV_ROUND_UP(8 * cstate->base.adjusted_mode.crtc_htotal * 1000,
			    pixel_rate);
	linetime_wm = DIV_ROUND_UP(8 * cstate->base.adjusted_mode.crtc_htotal *
				   1000, pixel_rate);

	/* Display WA #1135: bxt. */
	if (IS_BROXTON(dev_priv) && dev_priv->ipc_enabled)
		linetime_wm = DIV_ROUND_UP(linetime_wm, 2);

	return linetime_wm;
}

static void skl_compute_transition_wm(struct intel_crtc_state *cstate,