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Commit a32737e1 authored by Russell King's avatar Russell King
Browse files

Merge branches 'fixes' and 'misc' into for-linus

parents 27edacac a3c2b511

arch/arm/Kconfig

+16 −0
Original line number Diff line number Diff line
@@ -258,6 +258,7 @@ config ARCH_INTEGRATOR 
	select ARCH_HAS_CPUFREQ

	select CLKDEV_LOOKUP

	select HAVE_MACH_CLKDEV

	select HAVE_TCM

	select ICST

	select GENERIC_CLOCKEVENTS

	select PLAT_VERSATILE
@@ -1126,6 +1127,11 @@ config ARM_TIMER_SP804 


source arch/arm/mm/Kconfig



config ARM_NR_BANKS

	int

	default 16 if ARCH_EP93XX

	default 8



config IWMMXT

	bool "Enable iWMMXt support"

	depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
@@ -1560,6 +1566,16 @@ config LOCAL_TIMERS 
	  accounting to be spread across the timer interval, preventing a

	  "thundering herd" at every timer tick.



config ARCH_NR_GPIO

	int

	default 1024 if ARCH_SHMOBILE || ARCH_TEGRA

	default 350 if ARCH_U8500

	default 0

	help

	  Maximum number of GPIOs in the system.



	  If unsure, leave the default value.



source kernel/Kconfig.preempt



config HZ

arch/arm/common/timer-sp.c

+1 −6
Original line number Diff line number Diff line
@@ -143,7 +143,6 @@ static int sp804_set_next_event(unsigned long next, 
}



static struct clock_event_device sp804_clockevent = {

	.shift		= 32,

	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,

	.set_mode	= sp804_set_mode,

	.set_next_event	= sp804_set_next_event,
@@ -169,13 +168,9 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int irq, 


	clkevt_base = base;

	clkevt_reload = DIV_ROUND_CLOSEST(rate, HZ);



	evt->name = name;

	evt->irq = irq;

	evt->mult = div_sc(rate, NSEC_PER_SEC, evt->shift);

	evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);

	evt->min_delta_ns = clockevent_delta2ns(0xf, evt);



	setup_irq(irq, &sp804_timer_irq);

	clockevents_register_device(evt);

	clockevents_config_and_register(evt, rate, 0xf, 0xffffffff);

}

arch/arm/include/asm/edac.h

0 → 100644
+48 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2011 Calxeda, Inc.

 * Based on PPC version Copyright 2007 MontaVista Software, Inc.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License along with

 * this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#ifndef ASM_EDAC_H

#define ASM_EDAC_H

/*

 * ECC atomic, DMA, SMP and interrupt safe scrub function.

 * Implements the per arch atomic_scrub() that EDAC use for software

 * ECC scrubbing.  It reads memory and then writes back the original

 * value, allowing the hardware to detect and correct memory errors.

 */

static inline void atomic_scrub(void *va, u32 size)

{

#if __LINUX_ARM_ARCH__ >= 6

	unsigned int *virt_addr = va;

	unsigned int temp, temp2;

	unsigned int i;



	for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) {

		/* Very carefully read and write to memory atomically

		 * so we are interrupt, DMA and SMP safe.

		 */

		__asm__ __volatile__("\n"

			"1:	ldrex	%0, [%2]\n"

			"	strex	%1, %0, [%2]\n"

			"	teq	%1, #0\n"

			"	bne	1b\n"

			: "=&r"(temp), "=&r"(temp2)

			: "r"(virt_addr)

			: "cc");

	}

#endif

}



#endif

arch/arm/include/asm/gpio.h

+4 −0
Original line number Diff line number Diff line 
#ifndef _ARCH_ARM_GPIO_H

#define _ARCH_ARM_GPIO_H



#if CONFIG_ARCH_NR_GPIO > 0

#define ARCH_NR_GPIO CONFIG_ARCH_NR_GPIO

#endif



/* not all ARM platforms necessarily support this API ... */

#include <mach/gpio.h>

arch/arm/include/asm/hardirq.h

+0 −17
Original line number Diff line number Diff line
@@ -27,23 +27,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu); 


#define arch_irq_stat_cpu	smp_irq_stat_cpu



#if NR_IRQS > 512

#define HARDIRQ_BITS	10

#elif NR_IRQS > 256

#define HARDIRQ_BITS	9

#else

#define HARDIRQ_BITS	8

#endif



/*

 * The hardirq mask has to be large enough to have space

 * for potentially all IRQ sources in the system nesting

 * on a single CPU:

 */

#if (1 << HARDIRQ_BITS) < NR_IRQS

# error HARDIRQ_BITS is too low!

#endif



#define __ARCH_IRQ_EXIT_IRQS_DISABLED	1



#endif /* __ASM_HARDIRQ_H */