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Commit a2d1a5fa authored by Yoshinori Sato's avatar Yoshinori Sato Committed by Paul Mundt
Browse files

sh: __addr_ok() and other misc nommu fixups.



A few more outstanding nommu fixups..

Signed-off-by: default avatarYoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 0b892935
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+3 −3
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ CONFIG_PAGE_OFFSET ?= 0x80000000
CONFIG_MEMORY_START     ?= 0x0c000000
CONFIG_BOOT_LINK_OFFSET ?= 0x00800000

IMAGE_OFFSET	:= $(shell printf "0x%8x" $$[$(CONFIG_PAGE_OFFSET)  + \
IMAGE_OFFSET	:= $(shell printf "0x%08x" $$[$(CONFIG_PAGE_OFFSET)  + \
					      $(CONFIG_MEMORY_START) + \
					      $(CONFIG_BOOT_LINK_OFFSET)])

+9 −4
Original line number Diff line number Diff line
@@ -302,9 +302,11 @@ ubc_set_tracing(int asid, unsigned long pc)
{
	ctrl_outl(pc, UBC_BARA);

#ifdef CONFIG_MMU
	/* We don't have any ASID settings for the SH-2! */
	if (cpu_data->type != CPU_SH7604)
		ctrl_outb(asid, UBC_BASRA);
#endif

	ctrl_outl(0, UBC_BAMRA);

@@ -347,6 +349,7 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne
	}
#endif

#ifdef CONFIG_MMU
	/*
	 * Restore the kernel mode register
	 *   	k7 (r7_bank1)
@@ -354,19 +357,21 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne
	asm volatile("ldc	%0, r7_bank"
		     : /* no output */
		     : "r" (task_thread_info(next)));
#endif

#ifdef CONFIG_MMU
	/* If no tasks are using the UBC, we're done */
	if (ubc_usercnt == 0)
		/* If no tasks are using the UBC, we're done */;
	else if (next->thread.ubc_pc && next->mm) {
		ubc_set_tracing(next->mm->context & MMU_CONTEXT_ASID_MASK,
				next->thread.ubc_pc);
		int asid = 0;
#ifdef CONFIG_MMU
		asid |= next->mm->context & MMU_CONTEXT_ASID_MASK;
#endif
		ubc_set_tracing(asid, next->thread.ubc_pc);
	} else {
		ctrl_outw(0, UBC_BBRA);
		ctrl_outw(0, UBC_BBRB);
	}
#endif

	return prev;
}
+4 −6
Original line number Diff line number Diff line
@@ -79,20 +79,18 @@ EXPORT_SYMBOL(strcpy);
DECLARE_EXPORT(__movstr_i4_even);
DECLARE_EXPORT(__movstr_i4_odd);
DECLARE_EXPORT(__movstrSI12_i4);
#endif

#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
/* needed by some modules */
EXPORT_SYMBOL(flush_cache_all);
EXPORT_SYMBOL(flush_cache_range);
EXPORT_SYMBOL(flush_dcache_page);
EXPORT_SYMBOL(__flush_purge_region);
EXPORT_SYMBOL(clear_user_page);
#endif

#if defined(CONFIG_SH7705_CACHE_32KB)
EXPORT_SYMBOL(flush_cache_all);
EXPORT_SYMBOL(flush_cache_range);
EXPORT_SYMBOL(flush_dcache_page);
EXPORT_SYMBOL(__flush_purge_region);
#ifdef CONFIG_MMU
EXPORT_SYMBOL(clear_user_page);
#endif

EXPORT_SYMBOL(flush_tlb_page);
+1 −1
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@ asmlinkage int sys_pipe(unsigned long r4, unsigned long r5,
	return error;
}

#if defined(HAVE_ARCH_UNMAPPED_AREA)
#if defined(HAVE_ARCH_UNMAPPED_AREA) && defined(CONFIG_MMU)
/*
 * To avoid cache alias, we map the shard page with same color.
 */
+1 −1
Original line number Diff line number Diff line
@@ -194,7 +194,7 @@ config MEMORY_SIZE

config 32BIT
	bool "Support 32-bit physical addressing through PMB"
	depends on CPU_SH4A
	depends on CPU_SH4A && MMU
	default y
	help
	  If you say Y here, physical addressing will be extended to
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