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Commit a2aa578f authored by David Wang's avatar David Wang Committed by Thomas Gleixner
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x86/Centaur: Report correct CPU/cache topology



Centaur CPUs enumerate the cache topology in the same way as Intel CPUs,
but the function is unused so for. The Centaur init code also misses to
initialize x86_info::max_cores, so the CPU topology can't be described
correctly.

Initialize x86_info::max_cores and invoke init_cacheinfo() to make
CPU and cache topology information available and correct.

Signed-off-by: default avatarDavid Wang <davidwang@zhaoxin.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: lukelin@viacpu.com
Cc: qiyuanwang@zhaoxin.com
Cc: gregkh@linuxfoundation.org
Cc: brucechang@via-alliance.com
Cc: timguo@zhaoxin.com
Cc: cooperyan@zhaoxin.com
Cc: hpa@zytor.com
Cc: benjaminpan@viatech.com
Link: https://lkml.kernel.org/r/1525314766-18910-4-git-send-email-davidwang@zhaoxin.com
parent 807e9bc8
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+5 −0
Original line number Original line Diff line number Diff line
@@ -160,6 +160,11 @@ static void init_centaur(struct cpuinfo_x86 *c)
	clear_cpu_cap(c, 0*32+31);
	clear_cpu_cap(c, 0*32+31);
#endif
#endif
	early_init_centaur(c);
	early_init_centaur(c);
	init_intel_cacheinfo(c);
	c->x86_max_cores = detect_num_cpu_cores(c);
#ifdef CONFIG_X86_32
	detect_ht(c);
#endif


	if (c->cpuid_level > 9) {
	if (c->cpuid_level > 9) {
		unsigned int eax = cpuid_eax(10);
		unsigned int eax = cpuid_eax(10);