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Commit a26c9563 authored by Ram Prakash Gupta's avatar Ram Prakash Gupta
Browse files

mmc: cqhci: Enable ICE error interrupts 



Enable general and invalid crypto error encounterd with command
queue engine during data transfer.

Change-Id: Idfaefcc44ece3144896619d6426bfc70eb4cc2cf
Signed-off-by: default avatarRam Prakash Gupta <rampraka@codeaurora.org>
parent ad6d422c

drivers/mmc/host/cqhci.c

+7 −3
Original line number Diff line number Diff line
@@ -790,8 +790,10 @@ static void cqhci_error_irq(struct mmc_host *mmc, u32 status, int cmd_error, 


	terri = cqhci_readl(cq_host, CQHCI_TERRI);



	pr_debug("%s: cqhci: error IRQ status: 0x%08x cmd error %d data error %d TERRI: 0x%08x\n",

	pr_err("%s: cqhci: error IRQ status: 0x%08x cmd error %d data error %d TERRI: 0x%08x\n",

		 mmc_hostname(mmc), status, cmd_error, data_error, terri);

	mmc_log_string(mmc, "%s: cqhci: status:0x%08x TERRI:0x%08x\n",

		 mmc_hostname(mmc), status, terri);



	/* Forget about errors when recovery has already been triggered */

	if (cq_host->recovery_halt)
@@ -896,20 +898,22 @@ static void cqhci_finish_mrq(struct mmc_host *mmc, unsigned int tag) 
irqreturn_t cqhci_irq(struct mmc_host *mmc, u32 intmask, int cmd_error,

		      int data_error)

{

	u32 status;

	u32 status, ice_err;

	unsigned long tag = 0, comp_status;

	struct cqhci_host *cq_host = mmc->cqe_private;



	status = cqhci_readl(cq_host, CQHCI_IS);

	ice_err = status & (CQHCI_IS_GCE | CQHCI_IS_ICCE);



	pr_debug("%s: cqhci: IRQ status: 0x%08x\n", mmc_hostname(mmc), status);

	mmc_log_string(mmc, "CQIS: 0x%x cmd_error : %d data_err: %d\n",

		status, cmd_error, data_error);



	if ((status & CQHCI_IS_RED) || cmd_error || data_error) {

	if ((status & CQHCI_IS_RED) || cmd_error || data_error || ice_err) {

		pr_err("%s: cqhci: error IRQ status: 0x%08x cmd error %d data error %d\n",

			mmc_hostname(mmc), status, cmd_error, data_error);

		cqhci_dumpregs(cq_host);

		mmc->need_hw_reset = true;

		cqhci_writel(cq_host, status, CQHCI_IS);

		cqhci_error_irq(mmc, status, cmd_error, data_error);

	} else {

drivers/mmc/host/cqhci.h

+5 −2
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -50,8 +50,11 @@ 
#define CQHCI_IS_TCC			BIT(1)

#define CQHCI_IS_RED			BIT(2)

#define CQHCI_IS_TCL			BIT(3)

#define CQHCI_IS_GCE			BIT(4)

#define CQHCI_IS_ICCE			BIT(5)



#define CQHCI_IS_MASK (CQHCI_IS_TCC | CQHCI_IS_RED)

#define CQHCI_IS_MASK (CQHCI_IS_TCC | CQHCI_IS_RED | \

			CQHCI_IS_GCE | CQHCI_IS_ICCE)



/* interrupt status enable */

#define CQHCI_ISTE			0x14

include/linux/mmc/host.h

+1 −0
Original line number Diff line number Diff line
@@ -632,6 +632,7 @@ struct mmc_host { 
	bool inlinecrypt_reset_needed;  /* Inline crypto reset */



	bool crash_on_err;	/* crash the system on error */

	bool need_hw_reset;

	atomic_t active_reqs;

	unsigned long		private[0] ____cacheline_aligned;

};