Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a232ee66 authored by Takashi Iwai's avatar Takashi Iwai
Browse files

Merge branch 'fix/hda' into for-linus

parents 6af845e4 c673ba1c
Loading
Loading
Loading
Loading
+26 −13
Original line number Diff line number Diff line
@@ -2059,16 +2059,22 @@ static int __devinit check_position_fix(struct azx *chip, int fix)
{
	const struct snd_pci_quirk *q;

	/* Check VIA HD Audio Controller exist */
	if (chip->pci->vendor == PCI_VENDOR_ID_VIA &&
	    chip->pci->device == VIA_HDAC_DEVICE_ID) {
	switch (fix) {
	case POS_FIX_LPIB:
	case POS_FIX_POSBUF:
		return fix;
	}

	/* Check VIA/ATI HD Audio Controller exist */
	switch (chip->driver_type) {
	case AZX_DRIVER_VIA:
	case AZX_DRIVER_ATI:
		chip->via_dmapos_patch = 1;
		/* Use link position directly, avoid any transfer problem. */
		return POS_FIX_LPIB;
	}
	chip->via_dmapos_patch = 0;

	if (fix == POS_FIX_AUTO) {
	q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
	if (q) {
		printk(KERN_INFO
@@ -2077,8 +2083,7 @@ static int __devinit check_position_fix(struct azx *chip, int fix)
		       q->value, q->subvendor, q->subdevice);
		return q->value;
	}
	}
	return fix;
	return POS_FIX_AUTO;
}

/*
@@ -2210,9 +2215,17 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
	gcap = azx_readw(chip, GCAP);
	snd_printdd("chipset global capabilities = 0x%x\n", gcap);

	/* ATI chips seems buggy about 64bit DMA addresses */
	if (chip->driver_type == AZX_DRIVER_ATI)
		gcap &= ~0x01;

	/* allow 64bit DMA address if supported by H/W */
	if ((gcap & 0x01) && !pci_set_dma_mask(pci, DMA_64BIT_MASK))
		pci_set_consistent_dma_mask(pci, DMA_64BIT_MASK);
	else {
		pci_set_dma_mask(pci, DMA_32BIT_MASK);
		pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK);
	}

	/* read number of streams from GCAP register instead of using
	 * hardcoded value