Merge branch 'intel' (a16af2ff) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/net/ethernet/intel/Kconfig

+13 −0

Original line number	Diff line number	Diff line
		@@ -94,6 +94,8 @@ config IGB
		tristate "Intel(R) 82575/82576 PCI-Express Gigabit Ethernet support"
		depends on PCI
		select PTP_1588_CLOCK
		select I2C
		select I2C_ALGOBIT
		---help---
		This driver supports Intel(R) 82575/82576 gigabit ethernet family of
		adapters. For more information on how to identify your adapter, go
		@@ -112,6 +114,17 @@ config IGB
		To compile this driver as a module, choose M here. The module
		will be called igb.

		config IGB_HWMON
		bool "Intel(R) PCI-Express Gigabit adapters HWMON support"
		default y
		depends on IGB && HWMON && !(IGB=y && HWMON=m)
		---help---
		Say Y if you want to expose thermal sensor data on Intel devices.

		Some of our devices contain thermal sensors, both external and internal.
		This data is available via the hwmon sysfs interface and exposes
		the onboard sensors.

		config IGB_DCA
		bool "Direct Cache Access (DCA) Support"
		default y

drivers/net/ethernet/intel/e1000e/82571.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -2044,6 +2044,7 @@ const struct e1000_info e1000_82574_info = {
		\| FLAG_HAS_MSIX
		\| FLAG_HAS_JUMBO_FRAMES
		\| FLAG_HAS_WOL
		\| FLAG_HAS_HW_TIMESTAMP
		\| FLAG_APME_IN_CTRL3
		\| FLAG_HAS_SMART_POWER_DOWN
		\| FLAG_HAS_AMT
		@@ -2065,6 +2066,7 @@ const struct e1000_info e1000_82583_info = {
		.mac = e1000_82583,
		.flags = FLAG_HAS_HW_VLAN_FILTER
		\| FLAG_HAS_WOL
		\| FLAG_HAS_HW_TIMESTAMP
		\| FLAG_APME_IN_CTRL3
		\| FLAG_HAS_SMART_POWER_DOWN
		\| FLAG_HAS_AMT

drivers/net/ethernet/intel/e1000e/defines.h

+44 −0

Original line number	Diff line number	Diff line
		@@ -107,6 +107,7 @@
		#define E1000_RXD_ERR_RXE 0x80 /* Rx Data Error */
		#define E1000_RXD_SPC_VLAN_MASK 0x0FFF /* VLAN ID is in lower 12 bits */

		#define E1000_RXDEXT_STATERR_TST 0x00000100 /* Time Stamp taken */
		#define E1000_RXDEXT_STATERR_CE 0x01000000
		#define E1000_RXDEXT_STATERR_SE 0x02000000
		#define E1000_RXDEXT_STATERR_SEQ 0x04000000
		@@ -318,6 +319,7 @@
		#define E1000_TXD_CMD_IP 0x02000000 /* IP packet */
		#define E1000_TXD_CMD_TSE 0x04000000 /* TCP Seg enable */
		#define E1000_TXD_STAT_TC 0x00000004 /* Tx Underrun */
		#define E1000_TXD_EXTCMD_TSTAMP 0x00000010 /* IEEE1588 Timestamp packet */

		/* Transmit Control */
		#define E1000_TCTL_EN 0x00000002 /* enable Tx */
		@@ -383,6 +385,9 @@

		#define E1000_KABGTXD_BGSQLBIAS 0x00050000

		/* Low Power IDLE Control */
		#define E1000_LPIC_LPIET_SHIFT 24 /* Low Power Idle Entry Time */

		/* PBA constants */
		#define E1000_PBA_8K 0x0008 /* 8KB */
		#define E1000_PBA_16K 0x0010 /* 16KB */
		@@ -533,6 +538,18 @@
		#define E1000_RXCW_C 0x20000000 /* Receive config */
		#define E1000_RXCW_SYNCH 0x40000000 /* Receive config synch */

		#define E1000_TSYNCTXCTL_VALID 0x00000001 /* Tx timestamp valid */
		#define E1000_TSYNCRXCTL_TYPE_ALL 0x08
		#define E1000_TSYNCTXCTL_ENABLED 0x00000010 /* enable Tx timestamping */

		#define E1000_TSYNCRXCTL_VALID 0x00000001 /* Rx timestamp valid */
		#define E1000_TSYNCRXCTL_TYPE_MASK 0x0000000E /* Rx type mask */
		#define E1000_TSYNCRXCTL_ENABLED 0x00000010 /* enable Rx timestamping */
		#define E1000_TSYNCRXCTL_SYSCFI 0x00000020 /* Sys clock frequency */

		#define E1000_TIMINCA_INCPERIOD_SHIFT 24
		#define E1000_TIMINCA_INCVALUE_MASK 0x00FFFFFF

		/* PCI Express Control */
		#define E1000_GCR_RXD_NO_SNOOP 0x00000001
		#define E1000_GCR_RXDSCW_NO_SNOOP 0x00000002
		@@ -799,6 +816,33 @@
		/* BME1000 PHY Specific Control Register */
		#define BME1000_PSCR_ENABLE_DOWNSHIFT 0x0800 /* 1 = enable downshift */

		/* PHY Low Power Idle Control */
		#define I82579_LPI_CTRL PHY_REG(772, 20)
		#define I82579_LPI_CTRL_100_ENABLE 0x2000
		#define I82579_LPI_CTRL_1000_ENABLE 0x4000
		#define I82579_LPI_CTRL_ENABLE_MASK 0x6000
		#define I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT 0x80

		/* Extended Management Interface (EMI) Registers */
		#define I82579_EMI_ADDR 0x10
		#define I82579_EMI_DATA 0x11
		#define I82579_LPI_UPDATE_TIMER 0x4805 /* in 40ns units + 40 ns base value */
		#define I82579_MSE_THRESHOLD 0x084F /* 82579 Mean Square Error Threshold */
		#define I82577_MSE_THRESHOLD 0x0887 /* 82577 Mean Square Error Threshold */
		#define I82579_MSE_LINK_DOWN 0x2411 /* MSE count before dropping link */
		#define I82579_EEE_PCS_STATUS 0x182D /* IEEE MMD Register 3.1 >> 8 */
		#define I82579_EEE_CAPABILITY 0x0410 /* IEEE MMD Register 3.20 */
		#define I82579_EEE_ADVERTISEMENT 0x040E /* IEEE MMD Register 7.60 */
		#define I82579_EEE_LP_ABILITY 0x040F /* IEEE MMD Register 7.61 */
		#define I82579_EEE_100_SUPPORTED (1 << 1) /* 100BaseTx EEE supported */
		#define I82579_EEE_1000_SUPPORTED (1 << 2) /* 1000BaseTx EEE supported */
		#define I217_EEE_PCS_STATUS 0x9401 /* IEEE MMD Register 3.1 */
		#define I217_EEE_CAPABILITY 0x8000 /* IEEE MMD Register 3.20 */
		#define I217_EEE_ADVERTISEMENT 0x8001 /* IEEE MMD Register 7.60 */
		#define I217_EEE_LP_ABILITY 0x8002 /* IEEE MMD Register 7.61 */

		#define E1000_EEE_RX_LPI_RCVD 0x0400 /* Tx LP idle received */
		#define E1000_EEE_TX_LPI_RCVD 0x0800 /* Rx LP idle received */

		#define PHY_PAGE_SHIFT 5
		#define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) \| \

drivers/net/ethernet/intel/e1000e/e1000.h

+46 −1

Original line number	Diff line number	Diff line
		@@ -41,6 +41,8 @@
		#include <linux/pci-aspm.h>
		#include <linux/crc32.h>
		#include <linux/if_vlan.h>
		#include <linux/clocksource.h>
		#include <linux/net_tstamp.h>

		#include "hw.h"

		@@ -353,6 +355,7 @@ struct e1000_adapter {
		u64 gorc_old;
		u32 alloc_rx_buff_failed;
		u32 rx_dma_failed;
		u32 rx_hwtstamp_cleared;

		unsigned int rx_ps_pages;
		u16 rx_ps_bsize0;
		@@ -402,6 +405,14 @@ struct e1000_adapter {

		u16 tx_ring_count;
		u16 rx_ring_count;

		struct hwtstamp_config hwtstamp_config;
		struct delayed_work systim_overflow_work;
		struct sk_buff *tx_hwtstamp_skb;
		struct work_struct tx_hwtstamp_work;
		spinlock_t systim_lock; /* protects SYSTIML/H regsters */
		struct cyclecounter cc;
		struct timecounter tc;
		};

		struct e1000_info {
		@@ -416,6 +427,38 @@ struct e1000_info {
		const struct e1000_nvm_operations *nvm_ops;
		};

		/* The system time is maintained by a 64-bit counter comprised of the 32-bit
		* SYSTIMH and SYSTIML registers. How the counter increments (and therefore
		* its resolution) is based on the contents of the TIMINCA register - it
		* increments every incperiod (bits 31:24) clock ticks by incvalue (bits 23:0).
		* For the best accuracy, the incperiod should be as small as possible. The
		* incvalue is scaled by a factor as large as possible (while still fitting
		* in bits 23:0) so that relatively small clock corrections can be made.
		*
		* As a result, a shift of INCVALUE_SHIFT_n is used to fit a value of
		* INCVALUE_n into the TIMINCA register allowing 32+8+(24-INCVALUE_SHIFT_n)
		* bits to count nanoseconds leaving the rest for fractional nonseconds.
		*/
		#define INCVALUE_96MHz 125
		#define INCVALUE_SHIFT_96MHz 17
		#define INCPERIOD_SHIFT_96MHz 2
		#define INCPERIOD_96MHz (12 >> INCPERIOD_SHIFT_96MHz)

		#define INCVALUE_25MHz 40
		#define INCVALUE_SHIFT_25MHz 18
		#define INCPERIOD_25MHz 1

		/* Another drawback of scaling the incvalue by a large factor is the
		* 64-bit SYSTIM register overflows more quickly. This is dealt with
		* by simply reading the clock before it overflows.
		*
		* Clock ns bits Overflows after
		* ~~~~~~ ~~~~~~~ ~~~~~~~~~~~~~~~
		* 96MHz 47-bit 2^(47-INCPERIOD_SHIFT_96MHz) / 10^9 / 3600 = 9.77 hrs
		* 25MHz 46-bit 2^46 / 10^9 / 3600 = 19.55 hours
		*/
		#define E1000_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 60 * 4)

		/* hardware capability, feature, and workaround flags */
		#define FLAG_HAS_AMT (1 << 0)
		#define FLAG_HAS_FLASH (1 << 1)
		@@ -431,7 +474,7 @@ struct e1000_info {
		#define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
		#define FLAG_IS_QUAD_PORT_A (1 << 12)
		#define FLAG_IS_QUAD_PORT (1 << 13)
		/* reserved bit14 */
		#define FLAG_HAS_HW_TIMESTAMP (1 << 14)
		#define FLAG_APME_IN_WUC (1 << 15)
		#define FLAG_APME_IN_CTRL3 (1 << 16)
		#define FLAG_APME_CHECK_PORT_B (1 << 17)
		@@ -463,6 +506,7 @@ struct e1000_info {
		#define FLAG2_NO_DISABLE_RX (1 << 10)
		#define FLAG2_PCIM2PCI_ARBITER_WA (1 << 11)
		#define FLAG2_DFLT_CRC_STRIPPING (1 << 12)
		#define FLAG2_CHECK_RX_HWTSTAMP (1 << 13)

		#define E1000_RX_DESC_PS(R, i) \
		(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
		@@ -659,6 +703,7 @@ extern s32 e1000_check_polarity_ife(struct e1000_hw *hw);
		extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
		extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
		extern bool e1000_check_phy_82574(struct e1000_hw *hw);
		extern s32 e1000_read_emi_reg_locked(struct e1000_hw hw, u16 addr, u16 data);

		static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
		{

drivers/net/ethernet/intel/e1000e/ethtool.c

+158 −1

Original line number	Diff line number	Diff line
		@@ -35,6 +35,7 @@
		#include <linux/slab.h>
		#include <linux/delay.h>
		#include <linux/vmalloc.h>
		#include <linux/mdio.h>

		#include "e1000.h"

		@@ -107,6 +108,7 @@ static const struct e1000_stats e1000_gstrings_stats[] = {
		E1000_STAT("dropped_smbus", stats.mgpdc),
		E1000_STAT("rx_dma_failed", rx_dma_failed),
		E1000_STAT("tx_dma_failed", tx_dma_failed),
		E1000_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
		};

		#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
		@@ -2050,6 +2052,159 @@ static int e1000_get_rxnfc(struct net_device *netdev,
		}
		}

		static int e1000e_get_eee(struct net_device netdev, struct ethtool_eee edata)
		{
		struct e1000_adapter *adapter = netdev_priv(netdev);
		struct e1000_hw *hw = &adapter->hw;
		u16 cap_addr, adv_addr, lpa_addr, pcs_stat_addr, phy_data, lpi_ctrl;
		u32 status, ret_val;

		if (!(adapter->flags & FLAG_IS_ICH) \|\|
		!(adapter->flags2 & FLAG2_HAS_EEE))
		return -EOPNOTSUPP;

		switch (hw->phy.type) {
		case e1000_phy_82579:
		cap_addr = I82579_EEE_CAPABILITY;
		adv_addr = I82579_EEE_ADVERTISEMENT;
		lpa_addr = I82579_EEE_LP_ABILITY;
		pcs_stat_addr = I82579_EEE_PCS_STATUS;
		break;
		case e1000_phy_i217:
		cap_addr = I217_EEE_CAPABILITY;
		adv_addr = I217_EEE_ADVERTISEMENT;
		lpa_addr = I217_EEE_LP_ABILITY;
		pcs_stat_addr = I217_EEE_PCS_STATUS;
		break;
		default:
		return -EOPNOTSUPP;
		}

		ret_val = hw->phy.ops.acquire(hw);
		if (ret_val)
		return -EBUSY;

		/* EEE Capability */
		ret_val = e1000_read_emi_reg_locked(hw, cap_addr, &phy_data);
		if (ret_val)
		goto release;
		edata->supported = mmd_eee_cap_to_ethtool_sup_t(phy_data);

		/* EEE Advertised */
		ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &phy_data);
		if (ret_val)
		goto release;
		edata->advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);

		/* EEE Link Partner Advertised */
		ret_val = e1000_read_emi_reg_locked(hw, lpa_addr, &phy_data);
		if (ret_val)
		goto release;
		edata->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(phy_data);

		/* EEE PCS Status */
		ret_val = e1000_read_emi_reg_locked(hw, pcs_stat_addr, &phy_data);
		if (hw->phy.type == e1000_phy_82579)
		phy_data <<= 8;

		release:
		hw->phy.ops.release(hw);
		if (ret_val)
		return -ENODATA;

		e1e_rphy(hw, I82579_LPI_CTRL, &lpi_ctrl);
		status = er32(STATUS);

		/* Result of the EEE auto negotiation - there is no register that
		* has the status of the EEE negotiation so do a best-guess based
		* on whether both Tx and Rx LPI indications have been received or
		* base it on the link speed, the EEE advertised speeds on both ends
		* and the speeds on which EEE is enabled locally.
		*/
		if (((phy_data & E1000_EEE_TX_LPI_RCVD) &&
		(phy_data & E1000_EEE_RX_LPI_RCVD)) \|\|
		((status & E1000_STATUS_SPEED_100) &&
		(edata->advertised & ADVERTISED_100baseT_Full) &&
		(edata->lp_advertised & ADVERTISED_100baseT_Full) &&
		(lpi_ctrl & I82579_LPI_CTRL_100_ENABLE)) \|\|
		((status & E1000_STATUS_SPEED_1000) &&
		(edata->advertised & ADVERTISED_1000baseT_Full) &&
		(edata->lp_advertised & ADVERTISED_1000baseT_Full) &&
		(lpi_ctrl & I82579_LPI_CTRL_1000_ENABLE)))
		edata->eee_active = true;

		edata->eee_enabled = !hw->dev_spec.ich8lan.eee_disable;
		edata->tx_lpi_enabled = true;
		edata->tx_lpi_timer = er32(LPIC) >> E1000_LPIC_LPIET_SHIFT;

		return 0;
		}

		static int e1000e_set_eee(struct net_device netdev, struct ethtool_eee edata)
		{
		struct e1000_adapter *adapter = netdev_priv(netdev);
		struct e1000_hw *hw = &adapter->hw;
		struct ethtool_eee eee_curr;
		s32 ret_val;

		if (!(adapter->flags & FLAG_IS_ICH) \|\|
		!(adapter->flags2 & FLAG2_HAS_EEE))
		return -EOPNOTSUPP;

		ret_val = e1000e_get_eee(netdev, &eee_curr);
		if (ret_val)
		return ret_val;

		if (eee_curr.advertised != edata->advertised) {
		e_err("Setting EEE advertisement is not supported\n");
		return -EINVAL;
		}

		if (eee_curr.tx_lpi_enabled != edata->tx_lpi_enabled) {
		e_err("Setting EEE tx-lpi is not supported\n");
		return -EINVAL;
		}

		if (eee_curr.tx_lpi_timer != edata->tx_lpi_timer) {
		e_err("Setting EEE Tx LPI timer is not supported\n");
		return -EINVAL;
		}

		if (hw->dev_spec.ich8lan.eee_disable != !edata->eee_enabled) {
		hw->dev_spec.ich8lan.eee_disable = !edata->eee_enabled;

		/* reset the link */
		if (netif_running(netdev))
		e1000e_reinit_locked(adapter);
		else
		e1000e_reset(adapter);
		}

		return 0;
		}

		static int e1000e_get_ts_info(struct net_device *netdev,
		struct ethtool_ts_info *info)
		{
		struct e1000_adapter *adapter = netdev_priv(netdev);

		ethtool_op_get_ts_info(netdev, info);

		if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
		return 0;

		info->so_timestamping \|= (SOF_TIMESTAMPING_TX_HARDWARE \|
		SOF_TIMESTAMPING_RX_HARDWARE \|
		SOF_TIMESTAMPING_RAW_HARDWARE);

		info->tx_types = (1 << HWTSTAMP_TX_OFF) \| (1 << HWTSTAMP_TX_ON);

		info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) \|
		(1 << HWTSTAMP_FILTER_ALL));

		return 0;
		}

		static const struct ethtool_ops e1000_ethtool_ops = {
		.get_settings = e1000_get_settings,
		.set_settings = e1000_set_settings,
		@@ -2077,7 +2232,9 @@ static const struct ethtool_ops e1000_ethtool_ops = {
		.get_coalesce = e1000_get_coalesce,
		.set_coalesce = e1000_set_coalesce,
		.get_rxnfc = e1000_get_rxnfc,
		.get_ts_info = ethtool_op_get_ts_info,
		.get_ts_info = e1000e_get_ts_info,
		.get_eee = e1000e_get_eee,
		.set_eee = e1000e_set_eee,
		};

		void e1000e_set_ethtool_ops(struct net_device *netdev)