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Commit a141fd55 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 fixes from Ingo Molnar:
 "Another round of CR3/PCID related fixes (I think this addresses all
  but one of the known problems with PCID support), an objtool fix plus
  a Clang fix that (finally) solves all Clang quirks to build a bootable
  x86 kernel as-is"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/asm: Fix inline asm call constraints for Clang
  objtool: Handle another GCC stack pointer adjustment bug
  x86/mm/32: Load a sane CR3 before cpu_init() on secondary CPUs
  x86/mm/32: Move setup_clear_cpu_cap(X86_FEATURE_PCID) earlier
  x86/mm/64: Stop using CR3.PCID == 0 in ASID-aware code
  x86/mm: Factor out CR3-building code
parents 16528a3f f5caf621

arch/x86/include/asm/alternative.h

+1 −2
Original line number Diff line number Diff line
@@ -218,10 +218,9 @@ static inline int alternatives_text_reserved(void *start, void *end) 
#define alternative_call_2(oldfunc, newfunc1, feature1, newfunc2, feature2,   \

			   output, input...)				      \

{									      \

	register void *__sp asm(_ASM_SP);				      \

	asm volatile (ALTERNATIVE_2("call %P[old]", "call %P[new1]", feature1,\

		"call %P[new2]", feature2)				      \

		: output, "+r" (__sp)					      \

		: output, ASM_CALL_CONSTRAINT				      \

		: [old] "i" (oldfunc), [new1] "i" (newfunc1),		      \

		  [new2] "i" (newfunc2), ## input);			      \

}

arch/x86/include/asm/asm.h

+11 −0
Original line number Diff line number Diff line
@@ -132,4 +132,15 @@ 
/* For C file, we already have NOKPROBE_SYMBOL macro */

#endif



#ifndef __ASSEMBLY__

/*

 * This output constraint should be used for any inline asm which has a "call"

 * instruction.  Otherwise the asm may be inserted before the frame pointer

 * gets set up by the containing function.  If you forget to do this, objtool

 * may print a "call without frame pointer save/setup" warning.

 */

register unsigned int __asm_call_sp asm("esp");

#define ASM_CALL_CONSTRAINT "+r" (__asm_call_sp)

#endif



#endif /* _ASM_X86_ASM_H */

arch/x86/include/asm/mmu_context.h

+28 −4
Original line number Diff line number Diff line
@@ -286,6 +286,32 @@ static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, 
	return __pkru_allows_pkey(vma_pkey(vma), write);

}



/*

 * If PCID is on, ASID-aware code paths put the ASID+1 into the PCID

 * bits.  This serves two purposes.  It prevents a nasty situation in

 * which PCID-unaware code saves CR3, loads some other value (with PCID

 * == 0), and then restores CR3, thus corrupting the TLB for ASID 0 if

 * the saved ASID was nonzero.  It also means that any bugs involving

 * loading a PCID-enabled CR3 with CR4.PCIDE off will trigger

 * deterministically.

 */



static inline unsigned long build_cr3(struct mm_struct *mm, u16 asid)

{

	if (static_cpu_has(X86_FEATURE_PCID)) {

		VM_WARN_ON_ONCE(asid > 4094);

		return __sme_pa(mm->pgd) | (asid + 1);

	} else {

		VM_WARN_ON_ONCE(asid != 0);

		return __sme_pa(mm->pgd);

	}

}



static inline unsigned long build_cr3_noflush(struct mm_struct *mm, u16 asid)

{

	VM_WARN_ON_ONCE(asid > 4094);

	return __sme_pa(mm->pgd) | (asid + 1) | CR3_NOFLUSH;

}



/*

 * This can be used from process context to figure out what the value of
@@ -296,10 +322,8 @@ static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, 
 */

static inline unsigned long __get_current_cr3_fast(void)

{

	unsigned long cr3 = __pa(this_cpu_read(cpu_tlbstate.loaded_mm)->pgd);



	if (static_cpu_has(X86_FEATURE_PCID))

		cr3 |= this_cpu_read(cpu_tlbstate.loaded_mm_asid);

	unsigned long cr3 = build_cr3(this_cpu_read(cpu_tlbstate.loaded_mm),

		this_cpu_read(cpu_tlbstate.loaded_mm_asid));



	/* For now, be very restrictive about when this can be called. */

	VM_WARN_ON(in_nmi() || preemptible());

arch/x86/include/asm/mshyperv.h

+4 −6
Original line number Diff line number Diff line
@@ -179,7 +179,6 @@ static inline u64 hv_do_hypercall(u64 control, void *input, void *output) 
	u64 input_address = input ? virt_to_phys(input) : 0;

	u64 output_address = output ? virt_to_phys(output) : 0;

	u64 hv_status;

	register void *__sp asm(_ASM_SP);



#ifdef CONFIG_X86_64

	if (!hv_hypercall_pg)
@@ -187,7 +186,7 @@ static inline u64 hv_do_hypercall(u64 control, void *input, void *output) 


	__asm__ __volatile__("mov %4, %%r8\n"

			     "call *%5"

			     : "=a" (hv_status), "+r" (__sp),

			     : "=a" (hv_status), ASM_CALL_CONSTRAINT,

			       "+c" (control), "+d" (input_address)

			     :  "r" (output_address), "m" (hv_hypercall_pg)

			     : "cc", "memory", "r8", "r9", "r10", "r11");
@@ -202,7 +201,7 @@ static inline u64 hv_do_hypercall(u64 control, void *input, void *output) 


	__asm__ __volatile__("call *%7"

			     : "=A" (hv_status),

			       "+c" (input_address_lo), "+r" (__sp)

			       "+c" (input_address_lo), ASM_CALL_CONSTRAINT

			     : "A" (control),

			       "b" (input_address_hi),

			       "D"(output_address_hi), "S"(output_address_lo),
@@ -224,12 +223,11 @@ static inline u64 hv_do_hypercall(u64 control, void *input, void *output) 
static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)

{

	u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;

	register void *__sp asm(_ASM_SP);



#ifdef CONFIG_X86_64

	{

		__asm__ __volatile__("call *%4"

				     : "=a" (hv_status), "+r" (__sp),

				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,

				       "+c" (control), "+d" (input1)

				     : "m" (hv_hypercall_pg)

				     : "cc", "r8", "r9", "r10", "r11");
@@ -242,7 +240,7 @@ static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1) 
		__asm__ __volatile__ ("call *%5"

				      : "=A"(hv_status),

					"+c"(input1_lo),

					"+r"(__sp)

					ASM_CALL_CONSTRAINT

				      :	"A" (control),

					"b" (input1_hi),

					"m" (hv_hypercall_pg)

arch/x86/include/asm/paravirt_types.h

+7 −7
Original line number Diff line number Diff line
@@ -459,8 +459,8 @@ int paravirt_disable_iospace(void); 
 */

#ifdef CONFIG_X86_32

#define PVOP_VCALL_ARGS							\

	unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx;	\

	register void *__sp asm("esp")

	unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx;



#define PVOP_CALL_ARGS			PVOP_VCALL_ARGS



#define PVOP_CALL_ARG1(x)		"a" ((unsigned long)(x))
@@ -480,8 +480,8 @@ int paravirt_disable_iospace(void); 
/* [re]ax isn't an arg, but the return val */

#define PVOP_VCALL_ARGS						\

	unsigned long __edi = __edi, __esi = __esi,		\

		__edx = __edx, __ecx = __ecx, __eax = __eax;	\

	register void *__sp asm("rsp")

		__edx = __edx, __ecx = __ecx, __eax = __eax;



#define PVOP_CALL_ARGS		PVOP_VCALL_ARGS



#define PVOP_CALL_ARG1(x)		"D" ((unsigned long)(x))
@@ -532,7 +532,7 @@ int paravirt_disable_iospace(void); 
			asm volatile(pre				\

				     paravirt_alt(PARAVIRT_CALL)	\

				     post				\

				     : call_clbr, "+r" (__sp)		\

				     : call_clbr, ASM_CALL_CONSTRAINT	\

				     : paravirt_type(op),		\

				       paravirt_clobber(clbr),		\

				       ##__VA_ARGS__			\
@@ -542,7 +542,7 @@ int paravirt_disable_iospace(void); 
			asm volatile(pre				\

				     paravirt_alt(PARAVIRT_CALL)	\

				     post				\

				     : call_clbr, "+r" (__sp)		\

				     : call_clbr, ASM_CALL_CONSTRAINT	\

				     : paravirt_type(op),		\

				       paravirt_clobber(clbr),		\

				       ##__VA_ARGS__			\
@@ -569,7 +569,7 @@ int paravirt_disable_iospace(void); 
		asm volatile(pre					\

			     paravirt_alt(PARAVIRT_CALL)		\

			     post					\

			     : call_clbr, "+r" (__sp)			\

			     : call_clbr, ASM_CALL_CONSTRAINT		\

			     : paravirt_type(op),			\

			       paravirt_clobber(clbr),			\

			       ##__VA_ARGS__				\