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Commit 9ff36ee9 authored by Andi Kleen's avatar Andi Kleen Committed by H. Peter Anvin
Browse files

x86, mce: rename mce_notify_user to mce_notify_irq 



Rename the mce_notify_user function to mce_notify_irq. The next
patch will split the wakeup handling of interrupt context
and of process context and it's better to give it a clearer
name for this.

Contains a fix from Ying Huang

[ Impact: cleanup ]

Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
Signed-off-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Cc: Huang Ying <ying.huang@intel.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent 4ef702c1

arch/x86/include/asm/mce.h

+1 −1
Original line number Diff line number Diff line
@@ -159,7 +159,7 @@ enum mcp_flags { 
};

void machine_check_poll(enum mcp_flags flags, mce_banks_t *b);



int mce_notify_user(void);

int mce_notify_irq(void);



DECLARE_PER_CPU(struct mce, injectm);

extern struct file_operations mce_chrdev_ops;

arch/x86/kernel/cpu/mcheck/mce-inject.c

+1 −1
Original line number Diff line number Diff line
@@ -65,7 +65,7 @@ static void raise_mce(unsigned long data) 
		memset(&b, 0xff, sizeof(mce_banks_t));

		printk(KERN_INFO "Starting machine check poll CPU %d\n", cpu);

		machine_check_poll(0, &b);

		mce_notify_user();

		mce_notify_irq();

		printk(KERN_INFO "Finished machine check poll on CPU %d\n",

		       cpu);

	}

arch/x86/kernel/cpu/mcheck/mce.c

+5 −5
Original line number Diff line number Diff line
@@ -348,7 +348,7 @@ asmlinkage void smp_mce_self_interrupt(struct pt_regs *regs) 
	ack_APIC_irq();

	exit_idle();

	irq_enter();

	mce_notify_user();

	mce_notify_irq();

	irq_exit();

}

#endif
@@ -356,7 +356,7 @@ asmlinkage void smp_mce_self_interrupt(struct pt_regs *regs) 
static void mce_report_event(struct pt_regs *regs)

{

	if (regs->flags & (X86_VM_MASK|X86_EFLAGS_IF)) {

		mce_notify_user();

		mce_notify_irq();

		return;

	}
@@ -968,7 +968,7 @@ static void mcheck_timer(unsigned long data) 
	 * polling interval, otherwise increase the polling interval.

	 */

	n = &__get_cpu_var(next_interval);

	if (mce_notify_user())

	if (mce_notify_irq())

		*n = max(*n/2, HZ/100);

	else

		*n = min(*n*2, (int)round_jiffies_relative(check_interval*HZ));
@@ -989,7 +989,7 @@ static DECLARE_WORK(mce_trigger_work, mce_do_trigger); 
 * Can be called from interrupt context, but not from machine check/NMI

 * context.

 */

int mce_notify_user(void)

int mce_notify_irq(void)

{

	/* Not more than two messages every minute */

	static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2);
@@ -1014,7 +1014,7 @@ int mce_notify_user(void) 
	}

	return 0;

}

EXPORT_SYMBOL_GPL(mce_notify_user);

EXPORT_SYMBOL_GPL(mce_notify_irq);



/*

 * Initialize Machine Checks for a CPU.

arch/x86/kernel/cpu/mcheck/mce_intel_64.c

+1 −1
Original line number Diff line number Diff line
@@ -80,7 +80,7 @@ static int cmci_supported(int *banks) 
static void intel_threshold_interrupt(void)

{

	machine_check_poll(MCP_TIMESTAMP, &__get_cpu_var(mce_banks_owned));

	mce_notify_user();

	mce_notify_irq();

}



static void print_update(char *type, int *hdr, int num)

arch/x86/kernel/signal.c

+1 −1
Original line number Diff line number Diff line
@@ -860,7 +860,7 @@ do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags) 
#ifdef CONFIG_X86_NEW_MCE

	/* notify userspace of pending MCEs */

	if (thread_info_flags & _TIF_MCE_NOTIFY)

		mce_notify_user();

		mce_notify_irq();

#endif /* CONFIG_X86_64 && CONFIG_X86_MCE */



	/* deal with pending signal delivery */