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Commit 9f43020d authored by Andy Gross's avatar Andy Gross
Browse files

arm64: dts: qcom: Add 8x16 Serial UART1 node 



This patch adds the nodes required to support the UART1 node on the
MSM8916 and also fixes the sleep pins function for UART2.

Signed-off-by: default avatarAndy Gross <agross@codeaurora.org>
parent f6d24bf3

arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ 
/ {

	aliases {

		serial0 = &blsp1_uart2;

		serial1 = &blsp1_uart1;

	};



	chosen {

arch/arm64/boot/dts/qcom/msm8916-pins.dtsi

+25 −1
Original line number Diff line number Diff line
@@ -13,6 +13,30 @@ 


&msmgpio {



	blsp1_uart1_default: blsp1_uart1_default {

		pinmux {

			function = "blsp_uart1";

			pins = "gpio0", "gpio1";

		};

		pinconf {

			pins = "gpio0", "gpio1";

			drive-strength = <16>;

			bias-disable;

		};

	};



	blsp1_uart1_sleep: blsp1_uart1_sleep {

		pinmux {

			function = "gpio";

			pins = "gpio0", "gpio1";

		};

		pinconf {

			pins = "gpio0", "gpio1";

			drive-strength = <2>;

			bias-pull-down;

		};

	};



	blsp1_uart2_default: blsp1_uart2_default {

		pinmux {

			function = "blsp_uart2";
@@ -27,7 +51,7 @@ 


	blsp1_uart2_sleep: blsp1_uart2_sleep {

		pinmux {

			function = "blsp_uart2";

			function = "gpio";

			pins = "gpio4", "gpio5";

		};

		pinconf {

arch/arm64/boot/dts/qcom/msm8916.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -102,6 +102,15 @@ 
			reg = <0x1800000 0x80000>;

		};



		blsp1_uart1: serial@78af000 {

			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";

			reg = <0x78af000 0x200>;

			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;

			clock-names = "core", "iface";

			status = "disabled";

		};



		blsp1_uart2: serial@78b0000 {

			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";

			reg = <0x78b0000 0x200>;