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Commit 9f2e731d authored by Rafał Miłecki's avatar Rafał Miłecki Committed by John W. Linville
Browse files

ssb: cc: add & fix defines 



We probably got false positive results for checking PLL being down.

Signed-off-by: default avatarRafał Miłecki <zajec5@gmail.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 767ad6a0

include/linux/ssb/ssb_driver_chipcommon.h

+7 −2
Original line number Diff line number Diff line
@@ -131,6 +131,9 @@ 
#define SSB_CHIPCO_GPIOIRQ		0x0074

#define SSB_CHIPCO_WATCHDOG		0x0080

#define SSB_CHIPCO_GPIOTIMER		0x0088		/* LED powersave (corerev >= 16) */

#define  SSB_CHIPCO_GPIOTIMER_OFFTIME	0x0000FFFF

#define  SSB_CHIPCO_GPIOTIMER_OFFTIME_SHIFT	0

#define  SSB_CHIPCO_GPIOTIMER_ONTIME	0xFFFF0000

#define  SSB_CHIPCO_GPIOTIMER_ONTIME_SHIFT	16

#define SSB_CHIPCO_GPIOTOUTM		0x008C		/* LED powersave (corerev >= 16) */

#define SSB_CHIPCO_CLOCK_N		0x0090
@@ -189,8 +192,10 @@ 
#define  SSB_CHIPCO_CLKCTLST_HAVEALPREQ	0x00000008 /* ALP available request */

#define  SSB_CHIPCO_CLKCTLST_HAVEHTREQ	0x00000010 /* HT available request */

#define  SSB_CHIPCO_CLKCTLST_HWCROFF	0x00000020 /* Force HW clock request off */

#define  SSB_CHIPCO_CLKCTLST_HAVEHT	0x00010000 /* HT available */

#define  SSB_CHIPCO_CLKCTLST_HAVEALP	0x00020000 /* APL available */

#define  SSB_CHIPCO_CLKCTLST_HAVEALP	0x00010000 /* ALP available */

#define  SSB_CHIPCO_CLKCTLST_HAVEHT	0x00020000 /* HT available */

#define  SSB_CHIPCO_CLKCTLST_4328A0_HAVEHT	0x00010000 /* 4328a0 has reversed bits */

#define  SSB_CHIPCO_CLKCTLST_4328A0_HAVEALP	0x00020000 /* 4328a0 has reversed bits */

#define SSB_CHIPCO_HW_WORKAROUND	0x01E4 /* Hardware workaround (rev >= 20) */

#define SSB_CHIPCO_UART0_DATA		0x0300

#define SSB_CHIPCO_UART0_IMR		0x0304