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Commit 9ef40126 authored by Srinivas Rao L's avatar Srinivas Rao L Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add RSC controller device nodes for Lagoon 

Add RSC controller device nodes for application processor and
display subsystem.

Change-Id: I0bb00a253aa6bffd7b06f42d8163628d5c812981
parent c4886bdf

qcom/lagoon.dtsi

+33 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <dt-bindings/clock/qcom,rpmh.h>

#include <dt-bindings/clock/qcom,videocc-lagoon.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/soc/qcom,rpmh-rsc.h>



/ {

	model = "Qualcomm Technologies, Inc. Lagoon";
@@ -670,6 +671,38 @@ 
		interrupt-controller;

	};



	apps_rsc: rsc@18200000 {

		label = "apps_rsc";

		compatible = "qcom,rpmh-rsc";

		reg = <0x18200000 0x10000>,

		      <0x18210000 0x10000>,

		      <0x18220000 0x10000>;

		reg-names = "drv-0", "drv-1", "drv-2";

		interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;

		qcom,tcs-offset = <0xd00>;

		qcom,drv-id = <2>;

		qcom,tcs-config = <ACTIVE_TCS  2>,

				  <SLEEP_TCS   3>,

				  <WAKE_TCS    3>,

				  <CONTROL_TCS 1>;

	};



	disp_rsc: rsc@af20000 {

		label = "disp_rsc";

		compatible = "qcom,rpmh-rsc";

		reg = <0xaf20000 0x10000>;

		reg-names = "drv-0";

		interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;

		qcom,tcs-offset = <0x1c00>;

		qcom,drv-id = <0>;

		qcom,tcs-config = <ACTIVE_TCS  0>,

				  <SLEEP_TCS   1>,

				  <WAKE_TCS    1>,

				  <CONTROL_TCS 1>;

	};



	qcom,msm-imem@146ab000 {

		compatible = "qcom,msm-imem";

		reg = <0x146ab000 0x1000>;