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Commit 9ed88554 authored by bjorn.helgaas@hp.com's avatar bjorn.helgaas@hp.com Committed by Greg Kroah-Hartman
Browse files

PCI: use dev_printk in x86 quirk messages 



Convert quirk printks to dev_printk().

Signed-off-by: default avatarBjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent f0fda801

arch/x86/kernel/quirks.c

+23 −20
Original line number Diff line number Diff line
@@ -30,8 +30,8 @@ static void __devinit quirk_intel_irqbalance(struct pci_dev *dev) 
	raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);



	if (!(word & (1 << 13))) {

		printk(KERN_INFO "Intel E7520/7320/7525 detected. "

			"Disabling irq balancing and affinity\n");

		dev_info(&dev->dev, "Intel E7520/7320/7525 detected; "

			"disabling irq balancing and affinity\n");

#ifdef CONFIG_IRQBALANCE

		irqbalance_disable("");

#endif
@@ -104,14 +104,16 @@ static void ich_force_enable_hpet(struct pci_dev *dev) 
	pci_read_config_dword(dev, 0xF0, &rcba);

	rcba &= 0xFFFFC000;

	if (rcba == 0) {

		printk(KERN_DEBUG "RCBA disabled. Cannot force enable HPET\n");

		dev_printk(KERN_DEBUG, &dev->dev, "RCBA disabled; "

			"cannot force enable HPET\n");

		return;

	}



	/* use bits 31:14, 16 kB aligned */

	rcba_base = ioremap_nocache(rcba, 0x4000);

	if (rcba_base == NULL) {

		printk(KERN_DEBUG "ioremap failed. Cannot force enable HPET\n");

		dev_printk(KERN_DEBUG, &dev->dev, "ioremap failed; "

			"cannot force enable HPET\n");

		return;

	}
@@ -122,8 +124,8 @@ static void ich_force_enable_hpet(struct pci_dev *dev) 
		/* HPET is enabled in HPTC. Just not reported by BIOS */

		val = val & 0x3;

		force_hpet_address = 0xFED00000 | (val << 12);

		printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",

			       force_hpet_address);

		dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at "

			"0x%lx\n", force_hpet_address);

		iounmap(rcba_base);

		return;

	}
@@ -142,11 +144,12 @@ static void ich_force_enable_hpet(struct pci_dev *dev) 
	if (err) {

		force_hpet_address = 0;

		iounmap(rcba_base);

		printk(KERN_DEBUG "Failed to force enable HPET\n");

		dev_printk(KERN_DEBUG, &dev->dev,

			"Failed to force enable HPET\n");

	} else {

		force_hpet_resume_type = ICH_FORCE_HPET_RESUME;

		printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",

			       force_hpet_address);

		dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at "

			"0x%lx\n", force_hpet_address);

	}

}
@@ -208,7 +211,7 @@ static void old_ich_force_enable_hpet(struct pci_dev *dev) 
	if (val & 0x4) {

		val &= 0x3;

		force_hpet_address = 0xFED00000 | (val << 12);

		printk(KERN_DEBUG "HPET at base address 0x%lx\n",

		dev_printk(KERN_DEBUG, &dev->dev, "HPET at 0x%lx\n",

			force_hpet_address);

		return;

	}
@@ -229,14 +232,14 @@ static void old_ich_force_enable_hpet(struct pci_dev *dev) 
		/* HPET is enabled in HPTC. Just not reported by BIOS */

		val &= 0x3;

		force_hpet_address = 0xFED00000 | (val << 12);

		printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",

			       force_hpet_address);

		dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at "

			"0x%lx\n", force_hpet_address);

		cached_dev = dev;

		force_hpet_resume_type = OLD_ICH_FORCE_HPET_RESUME;

		return;

	}



	printk(KERN_DEBUG "Failed to force enable HPET\n");

	dev_printk(KERN_DEBUG, &dev->dev, "Failed to force enable HPET\n");

}



/*
@@ -294,7 +297,7 @@ static void vt8237_force_enable_hpet(struct pci_dev *dev) 
	 */

	if (val & 0x80) {

		force_hpet_address = (val & ~0x3ff);

		printk(KERN_DEBUG "HPET at base address 0x%lx\n",

		dev_printk(KERN_DEBUG, &dev->dev, "HPET at 0x%lx\n",

			force_hpet_address);

		return;

	}
@@ -309,14 +312,14 @@ static void vt8237_force_enable_hpet(struct pci_dev *dev) 
	pci_read_config_dword(dev, 0x68, &val);

	if (val & 0x80) {

		force_hpet_address = (val & ~0x3ff);

		printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",

			       force_hpet_address);

		dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at "

			"0x%lx\n", force_hpet_address);

		cached_dev = dev;

		force_hpet_resume_type = VT8237_FORCE_HPET_RESUME;

		return;

	}



	printk(KERN_DEBUG "Failed to force enable HPET\n");

	dev_printk(KERN_DEBUG, &dev->dev, "Failed to force enable HPET\n");

}



DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235,
@@ -344,7 +347,7 @@ static void nvidia_force_enable_hpet(struct pci_dev *dev) 
	pci_read_config_dword(dev, 0x44, &val);

	force_hpet_address = val & 0xfffffffe;

	force_hpet_resume_type = NVIDIA_FORCE_HPET_RESUME;

	printk(KERN_DEBUG "Force enabled HPET at base address 0x%lx\n",

	dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at 0x%lx\n",

		force_hpet_address);

	cached_dev = dev;

	return;

arch/x86/pci/fixup.c

+11 −11
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ static void __devinit pci_fixup_i450nx(struct pci_dev *d) 
	int pxb, reg;

	u8 busno, suba, subb;



	printk(KERN_WARNING "PCI: Searching for i450NX host bridges on %s\n", pci_name(d));

	dev_warn(&d->dev, "Searching for i450NX host bridges\n");

	reg = 0xd0;

	for(pxb = 0; pxb < 2; pxb++) {

		pci_read_config_byte(d, reg++, &busno);
@@ -41,7 +41,7 @@ static void __devinit pci_fixup_i450gx(struct pci_dev *d) 
	 */

	u8 busno;

	pci_read_config_byte(d, 0x4a, &busno);

	printk(KERN_INFO "PCI: i440KX/GX host bridge %s: secondary bus %02x\n", pci_name(d), busno);

	dev_info(&d->dev, "i440KX/GX host bridge; secondary bus %02x\n", busno);

	pci_scan_bus_with_sysdata(busno);

	pcibios_last_bus = -1;

}
@@ -55,7 +55,7 @@ static void __devinit pci_fixup_umc_ide(struct pci_dev *d) 
	 */

	int i;



	printk(KERN_WARNING "PCI: Fixing base address flags for device %s\n", pci_name(d));

	dev_warn(&d->dev, "Fixing base address flags\n");

	for(i = 0; i < 4; i++)

		d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO;

}
@@ -68,7 +68,7 @@ static void __devinit pci_fixup_ncr53c810(struct pci_dev *d) 
	 * Fix class to be PCI_CLASS_STORAGE_SCSI

	 */

	if (!d->class) {

		printk(KERN_WARNING "PCI: fixing NCR 53C810 class code for %s\n", pci_name(d));

		dev_warn(&d->dev, "Fixing NCR 53C810 class code\n");

		d->class = PCI_CLASS_STORAGE_SCSI << 8;

	}

}
@@ -80,7 +80,7 @@ static void __devinit pci_fixup_latency(struct pci_dev *d) 
	 *  SiS 5597 and 5598 chipsets require latency timer set to

	 *  at most 32 to avoid lockups.

	 */

	DBG("PCI: Setting max latency to 32\n");

	dev_dbg(&d->dev, "Setting max latency to 32\n");

	pcibios_max_latency = 32;

}

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, pci_fixup_latency);
@@ -138,7 +138,7 @@ static void pci_fixup_via_northbridge_bug(struct pci_dev *d) 


	pci_read_config_byte(d, where, &v);

	if (v & ~mask) {

		printk(KERN_WARNING "Disabling VIA memory write queue (PCI ID %04x, rev %02x): [%02x] %02x & %02x -> %02x\n", \

		dev_warn(&d->dev, "Disabling VIA memory write queue (PCI ID %04x, rev %02x): [%02x] %02x & %02x -> %02x\n", \

			d->device, d->revision, where, v, mask, v & mask);

		v &= mask;

		pci_write_config_byte(d, where, v);
@@ -200,7 +200,7 @@ static void pci_fixup_nforce2(struct pci_dev *dev) 
	 * Apply fixup if needed, but don't touch disconnect state

	 */

	if ((val & 0x00FF0000) != 0x00010000) {

		printk(KERN_WARNING "PCI: nForce2 C1 Halt Disconnect fixup\n");

		dev_warn(&dev->dev, "nForce2 C1 Halt Disconnect fixup\n");

		pci_write_config_dword(dev, 0x6c, (val & 0xFF00FFFF) | 0x00010000);

	}

}
@@ -348,7 +348,7 @@ static void __devinit pci_fixup_video(struct pci_dev *pdev) 
	pci_read_config_word(pdev, PCI_COMMAND, &config);

	if (config & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) {

		pdev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_SHADOW;

		printk(KERN_DEBUG "Boot video device is %s\n", pci_name(pdev));

		dev_printk(KERN_DEBUG, &pdev->dev, "Boot video device\n");

	}

}

DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_video);
@@ -388,11 +388,11 @@ static void __devinit pci_fixup_msi_k8t_onboard_sound(struct pci_dev *dev) 
		/* verify the change for status output */

		pci_read_config_byte(dev, 0x50, &val);

		if (val & 0x40)

			printk(KERN_INFO "PCI: Detected MSI K8T Neo2-FIR, "

			dev_info(&dev->dev, "Detected MSI K8T Neo2-FIR; "

					"can't enable onboard soundcard!\n");

		else

			printk(KERN_INFO "PCI: Detected MSI K8T Neo2-FIR, "

					"enabled onboard soundcard.\n");

			dev_info(&dev->dev, "Detected MSI K8T Neo2-FIR; "

					"enabled onboard soundcard\n");

	}

}

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237,