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Commit 9ea46abe authored by David S. Miller's avatar David S. Miller
Browse files

sparc64: Take ctx_alloc_lock properly in hugetlb_setup(). 



On cheetahplus chips we take the ctx_alloc_lock in order to
modify the TLB lookup parameters for the indexed TLBs, which
are stored in the context register.

This is called with interrupts disabled, however ctx_alloc_lock
is an IRQ safe lock, therefore we must take acquire/release it
properly with spin_{lock,unlock}_irq().

Reported-by: default avatarMeelis Roos <mroos@linux.ee>
Tested-by: default avatarMeelis Roos <mroos@linux.ee>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent ecc5fbd5

arch/sparc/mm/init_64.c

+7 −3
Original line number Diff line number Diff line
@@ -2824,9 +2824,10 @@ void hugetlb_setup(struct pt_regs *regs) 
	 * the Data-TLB for huge pages.

	 */

	if (tlb_type == cheetah_plus) {

		bool need_context_reload = false;

		unsigned long ctx;



		spin_lock(&ctx_alloc_lock);

		spin_lock_irq(&ctx_alloc_lock);

		ctx = mm->context.sparc64_ctx_val;

		ctx &= ~CTX_PGSZ_MASK;

		ctx |= CTX_PGSZ_BASE << CTX_PGSZ0_SHIFT;
@@ -2845,9 +2846,12 @@ void hugetlb_setup(struct pt_regs *regs) 
			 * also executing in this address space.

			 */

			mm->context.sparc64_ctx_val = ctx;

			on_each_cpu(context_reload, mm, 0);

			need_context_reload = true;

		}

		spin_unlock(&ctx_alloc_lock);

		spin_unlock_irq(&ctx_alloc_lock);



		if (need_context_reload)

			on_each_cpu(context_reload, mm, 0);

	}

}

#endif