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Commit 9e3bff92 authored by Florian Fainelli's avatar Florian Fainelli Committed by David S. Miller
Browse files

net: systemport: Fix CRC forwarding check for SYSTEMPORT Lite 



SYSTEMPORT Lite reversed the logic compared to SYSTEMPORT, the
GIB_FCS_STRIP bit is set when the Ethernet FCS is stripped, and that bit
is not set by default. Fix the logic such that we properly check whether
that bit is set or not and we don't forward an extra 4 bytes to the
network stack.

Fixes: 44a4524c ("net: systemport: Add support for SYSTEMPORT Lite")
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 70b7ff13

drivers/net/ethernet/broadcom/bcmsysport.c

+2 −2
Original line number Diff line number Diff line
@@ -1946,8 +1946,8 @@ static int bcm_sysport_open(struct net_device *dev) 
	if (!priv->is_lite)

		priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);

	else

		priv->crc_fwd = !!(gib_readl(priv, GIB_CONTROL) &

				   GIB_FCS_STRIP);

		priv->crc_fwd = !((gib_readl(priv, GIB_CONTROL) &

				  GIB_FCS_STRIP) >> GIB_FCS_STRIP_SHIFT);



	phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,

				0, priv->phy_interface);

drivers/net/ethernet/broadcom/bcmsysport.h

+2 −1
Original line number Diff line number Diff line
@@ -278,7 +278,8 @@ struct bcm_rsb { 
#define  GIB_GTX_CLK_EXT_CLK		(0 << GIB_GTX_CLK_SEL_SHIFT)

#define  GIB_GTX_CLK_125MHZ		(1 << GIB_GTX_CLK_SEL_SHIFT)

#define  GIB_GTX_CLK_250MHZ		(2 << GIB_GTX_CLK_SEL_SHIFT)

#define  GIB_FCS_STRIP			(1 << 6)

#define  GIB_FCS_STRIP_SHIFT		6

#define  GIB_FCS_STRIP			(1 << GIB_FCS_STRIP_SHIFT)

#define  GIB_LCL_LOOP_EN		(1 << 7)

#define  GIB_LCL_LOOP_TXEN		(1 << 8)

#define  GIB_RMT_LOOP_EN		(1 << 9)